GB1514624A - Integrated circuits - Google Patents

Integrated circuits

Info

Publication number
GB1514624A
GB1514624A GB5684/76A GB568476A GB1514624A GB 1514624 A GB1514624 A GB 1514624A GB 5684/76 A GB5684/76 A GB 5684/76A GB 568476 A GB568476 A GB 568476A GB 1514624 A GB1514624 A GB 1514624A
Authority
GB
United Kingdom
Prior art keywords
zone
zones
substrate
resistor
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5684/76A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1514624A publication Critical patent/GB1514624A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
GB5684/76A 1975-03-11 1976-02-13 Integrated circuits Expired GB1514624A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2510593A DE2510593C3 (de) 1975-03-11 1975-03-11 Integrierte Halbleiter-Schaltungsanordnung

Publications (1)

Publication Number Publication Date
GB1514624A true GB1514624A (en) 1978-06-14

Family

ID=5941047

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5684/76A Expired GB1514624A (en) 1975-03-11 1976-02-13 Integrated circuits

Country Status (7)

Country Link
US (1) US4323913A (US20030204162A1-20031030-M00001.png)
JP (1) JPS51113475A (US20030204162A1-20031030-M00001.png)
CA (1) CA1055619A (US20030204162A1-20031030-M00001.png)
DE (1) DE2510593C3 (US20030204162A1-20031030-M00001.png)
FR (1) FR2304178A1 (US20030204162A1-20031030-M00001.png)
GB (1) GB1514624A (US20030204162A1-20031030-M00001.png)
IT (1) IT1056855B (US20030204162A1-20031030-M00001.png)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51113578A (en) * 1975-03-31 1976-10-06 Hitachi Ltd Semi-conductor elements
JPS6057707B2 (ja) * 1978-01-25 1985-12-16 株式会社日立製作所 記憶回路
EP0029350B1 (en) * 1979-11-14 1987-08-05 Fujitsu Limited An output transistor of a ttl device with a means for discharging carriers
JPS5829628B2 (ja) * 1979-11-22 1983-06-23 富士通株式会社 半導体記憶装置
US4432008A (en) * 1980-07-21 1984-02-14 The Board Of Trustees Of The Leland Stanford Junior University Gold-doped IC resistor region
US4419150A (en) * 1980-12-29 1983-12-06 Rockwell International Corporation Method of forming lateral bipolar transistors
US4466180A (en) * 1981-06-25 1984-08-21 Rockwell International Corporation Method of manufacturing punch through voltage regulator diodes utilizing shaping and selective doping
JPS588514U (ja) * 1981-07-10 1983-01-20 東芝タンガロイ株式会社 ボ−ルエンドミル
JPS5812350A (ja) * 1981-07-16 1983-01-24 Nec Corp 半導体集積回路装置
DE3144920A1 (de) * 1981-11-12 1983-05-26 Krauss-Maffei AG, 8000 München Mischkopf
JPS58171832A (ja) * 1982-03-31 1983-10-08 Toshiba Corp 半導体装置の製造方法
JPS6039415U (ja) * 1983-08-23 1985-03-19 東芝タンガロイ株式会社 スロ−アウエイ式のエンドミル
JPS60117613A (ja) * 1983-11-30 1985-06-25 Fujitsu Ltd 半導体装置の製造方法
JPS62230051A (ja) * 1986-03-31 1987-10-08 Nec Corp トランジスタ
US5095348A (en) * 1989-10-02 1992-03-10 Texas Instruments Incorporated Semiconductor on insulator transistor
US7084483B2 (en) * 2004-05-25 2006-08-01 International Business Machines Corporation Trench type buried on-chip precision programmable resistor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1774929C3 (de) * 1968-03-01 1975-09-04 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Speicherzelle mit zwei kreuzgekoppelten Transistoren
US3631311A (en) * 1968-03-26 1971-12-28 Telefunken Patent Semiconductor circuit arrangement with integrated base leakage resistance
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL170901C (nl) * 1971-04-03 1983-01-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL161301C (nl) * 1972-12-29 1980-01-15 Philips Nv Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan.
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring

Also Published As

Publication number Publication date
US4323913A (en) 1982-04-06
DE2510593A1 (de) 1976-09-23
CA1055619A (en) 1979-05-29
FR2304178B1 (US20030204162A1-20031030-M00001.png) 1982-10-08
JPS5526620B2 (US20030204162A1-20031030-M00001.png) 1980-07-15
FR2304178A1 (fr) 1976-10-08
DE2510593C3 (de) 1982-03-18
DE2510593B2 (de) 1981-07-16
JPS51113475A (en) 1976-10-06
IT1056855B (it) 1982-02-20

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee