GB1477511A - Methods of manufacturing semiconductor devices - Google Patents

Methods of manufacturing semiconductor devices

Info

Publication number
GB1477511A
GB1477511A GB2258374A GB2258374A GB1477511A GB 1477511 A GB1477511 A GB 1477511A GB 2258374 A GB2258374 A GB 2258374A GB 2258374 A GB2258374 A GB 2258374A GB 1477511 A GB1477511 A GB 1477511A
Authority
GB
United Kingdom
Prior art keywords
boron
strip
oxide
polysilicon
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2258374A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Philips Components Ltd
Original Assignee
Mullard Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mullard Ltd filed Critical Mullard Ltd
Priority to GB2258374A priority Critical patent/GB1477511A/en
Priority to GB603177A priority patent/GB1477512A/en
Priority to CA227,266A priority patent/CA1040749A/en
Priority to NL7505698A priority patent/NL7505698A/xx
Priority to DE19752522448 priority patent/DE2522448A1/de
Priority to JP5979875A priority patent/JPS5617826B2/ja
Priority to FR7515787A priority patent/FR2272486B1/fr
Priority to US05/761,369 priority patent/US4124933A/en
Publication of GB1477511A publication Critical patent/GB1477511A/en
Priority to US05/963,546 priority patent/US4287660A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
    • H10D64/0133—Aspects related to lithography, isolation or planarisation of the conductor at least part of the entire electrode being a sidewall spacer, being formed by transformation under a mask or being formed by plating at a sidewall
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/30—Diffusion for doping of conductive or resistive layers
    • H10P32/302—Doping polycrystalline silicon or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/66—Wet etching of conductive or resistive materials
    • H10P50/663—Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Weting (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
GB2258374A 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices Expired GB1477511A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
GB2258374A GB1477511A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices
GB603177A GB1477512A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices
CA227,266A CA1040749A (en) 1974-05-21 1975-05-15 Method of manufacturing fine line conductors on semiconductors
NL7505698A NL7505698A (nl) 1974-05-21 1975-05-15 Werkwijze ter vervaardiging van een halfgelei- derinrichting en halfgeleiderinrichting ver- vaardigd volgens deze werkwijze.
DE19752522448 DE2522448A1 (de) 1974-05-21 1975-05-21 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung
JP5979875A JPS5617826B2 (https=) 1974-05-21 1975-05-21
FR7515787A FR2272486B1 (https=) 1974-05-21 1975-05-21
US05/761,369 US4124933A (en) 1974-05-21 1977-01-21 Methods of manufacturing semiconductor devices
US05/963,546 US4287660A (en) 1974-05-21 1978-11-24 Methods of manufacturing semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2258374A GB1477511A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
GB1477511A true GB1477511A (en) 1977-06-22

Family

ID=10181779

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2258374A Expired GB1477511A (en) 1974-05-21 1974-05-21 Methods of manufacturing semiconductor devices

Country Status (6)

Country Link
JP (1) JPS5617826B2 (https=)
CA (1) CA1040749A (https=)
DE (1) DE2522448A1 (https=)
FR (1) FR2272486B1 (https=)
GB (1) GB1477511A (https=)
NL (1) NL7505698A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111665669A (zh) * 2015-01-08 2020-09-15 群创光电股份有限公司 显示面板

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
JPS598855Y2 (ja) * 1978-09-01 1984-03-19 大阪電気株式会社 ワイヤ送給装置
JPS5546570A (en) * 1978-09-30 1980-04-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Method of fabricating mos semiconductor device
US4298402A (en) * 1980-02-04 1981-11-03 Fairchild Camera & Instrument Corp. Method of fabricating self-aligned lateral bipolar transistor utilizing special masking techniques
JPS6070401U (ja) * 1983-10-24 1985-05-18 株式会社月星製作所 車輪用スポ−ク

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542501B2 (https=) * 1974-01-29 1980-10-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111665669A (zh) * 2015-01-08 2020-09-15 群创光电股份有限公司 显示面板

Also Published As

Publication number Publication date
JPS51282A (https=) 1976-01-05
DE2522448A1 (de) 1975-12-04
FR2272486B1 (https=) 1979-01-19
CA1040749A (en) 1978-10-17
FR2272486A1 (https=) 1975-12-19
NL7505698A (nl) 1975-11-25
JPS5617826B2 (https=) 1981-04-24

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee