GB1454357A - Data processing systems - Google Patents

Data processing systems

Info

Publication number
GB1454357A
GB1454357A GB691174A GB691174A GB1454357A GB 1454357 A GB1454357 A GB 1454357A GB 691174 A GB691174 A GB 691174A GB 691174 A GB691174 A GB 691174A GB 1454357 A GB1454357 A GB 1454357A
Authority
GB
United Kingdom
Prior art keywords
page
address
virtual
real address
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB691174A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1454357A publication Critical patent/GB1454357A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1081Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Bus Control (AREA)

Abstract

1454357 Data processing system SIEMENS AG 15 Feb 1974 [21 March 1973] 6911/74 Addition to 1447680 Heading G4A The Specification describes the way in which the entries in the chain list store of the Specification 1,447,680 are established and maintained. The operating system produces a current virtual address and a corresponding current real address or a sequence of such addresses. The page part of the current virtual address is concatenated with a base address to access the appropriate entry in a page table which is loaded with the page part of the current real address thereby to establish or update the page table. The page part of the current virtual address is then decremented and again used to access the page table so as to produce the page part of real address corresponding to the virtual page preceding the current virtual page in the program sequence of virtual pages. This real address is then concatenated with a base address to access the appropriate entry in the chain list store which is loaded with the page part of the current real address. The page part of the current real address is then used to access the chain list store which is loaded with the page part of the real address corresponding to the preceding virtual page. In this way each time a new entry is made in a page table or an old entry is updated (e.g. due to page relocation) the chain list store is updated so that it contains one entry for each real page in the working store, each entry, except those corresponding to the first and last pages in the sequence, giving the real address of the preceding and succeeding pages in the sequence of virtual pages. - Additional data, e.g. data indicating that the succeeding page may only be used in certain circumstances, or store protection data, may be stored in the chain list store.
GB691174A 1973-01-18 1974-02-15 Data processing systems Expired GB1454357A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19732302379 DE2302379C3 (en) 1973-01-18 1973-01-18 Circuit arrangement for performing sequentially running input / output operations in a data processing system working with virtual addressing
DE19732314070 DE2314070C3 (en) 1973-01-18 1973-03-21 Method and circuit arrangement for creating the entries of a linked list memory in a method and a circuit arrangement for performing sequentially running input / output operations in a data processing system operating with virtual addressing
DE19742444406 DE2444406A1 (en) 1973-01-18 1974-09-17 METHOD FOR PERFORMING INPUT / OUTPUT OPERATIONS IN A DATA PROCESSING SYSTEM WORKING WITH VIRTUAL ADDRESSING

Publications (1)

Publication Number Publication Date
GB1454357A true GB1454357A (en) 1976-11-03

Family

ID=27184986

Family Applications (2)

Application Number Title Priority Date Filing Date
GB5705473A Expired GB1447680A (en) 1973-01-18 1973-12-10 Data processing systems
GB691174A Expired GB1454357A (en) 1973-01-18 1974-02-15 Data processing systems

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB5705473A Expired GB1447680A (en) 1973-01-18 1973-12-10 Data processing systems

Country Status (6)

Country Link
BE (3) BE809930A (en)
DE (3) DE2302379C3 (en)
FR (4) FR2214923B1 (en)
GB (2) GB1447680A (en)
LU (2) LU69174A1 (en)
NL (3) NL7400649A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2437300A1 (en) * 1978-09-26 1980-04-25 Cii Honeywell Bull Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin

Also Published As

Publication number Publication date
NL7403609A (en) 1974-09-24
BE812640R (en) 1974-09-23
BE833520R (en) 1976-03-17
DE2314070C3 (en) 1980-08-07
GB1447680A (en) 1976-08-25
BE809930A (en) 1974-07-18
DE2302379B2 (en) 1977-03-31
NL7400649A (en) 1974-07-22
FR2214923B1 (en) 1978-08-04
LU69174A1 (en) 1974-04-08
DE2302379C3 (en) 1978-12-07
FR2222696A2 (en) 1974-10-18
DE2444406A1 (en) 1976-03-25
NL7510623A (en) 1976-03-19
FR108891A (en)
FR2285658B2 (en) 1978-09-08
DE2314070B2 (en) 1979-11-29
FR2214923A1 (en) 1974-08-19
FR2285658A2 (en) 1976-04-16
LU69663A1 (en) 1974-10-17
DE2314070A1 (en) 1974-10-10
FR2222696B2 (en) 1978-09-08
DE2302379A1 (en) 1974-08-15

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee