1348171 Digital data processors PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 19 April 1971 [31 March 1970] 25397/71 Heading G4A Mutually dependent computer processes are controlled by a system in which a variable which may be called for in a process is stored in a memory. The variable includes a status marking in a flagfield either of the word at the address of the variable in the memory or of the word from which direct or indirect reference is made to the address of the variable. Means are provided for marking in the flagfield the status of the variable, and for retrieving the marking by addressing the word containing the flagfield. The retrieved status marking controls the computer process, the status of the variable indicating at least one of a number of states that the variable can have. The particular state is determined by the particular stage reached in the computer process. The process operates on one or more further variables on which the variable depends. In one arrangement, Fig. 1, a memory M associated with a processor CP contains variables, e.g. y and z, stored at addresses A0, A1 together with flagfields F10, F11 which contain the status of the variable. During allocation of locations to the variable the status "a prior unknown" (apu) may be allotted to the variable via input register IR and address register AR. When a program PO becomes active a work area, e.g. PWO, of memory M is allocated to it. When the program calls for a varaible by reading the appropriate address in to register AR via instruction line W, the variable and its flag appear in output register UR (=UR<SP>1</SP>). Flag decoder Fd determines the status. If the variable is known, status k, the variable is passed to the processor CP. On the other hand if the status is, e.g. busy (bu), partially known (ua), or effectively incalculable [uh), an interrupt int is passed to the processor. Alternatively, if the status is partially known (ua) the program may be allowed to proceed using the approximate value of the variable. If the variable z depends on y the status of z can change only if y is known (status k). If the status of y is busy (bu), i.e. if y is being processed in a sub-block program Py of program PO, processing of z in a sub-block program Pz is deferred, Pz joining a queue of programs waiting for y. If y is unknown (status apu) Pz is interrupted and Py is started. In the case of indirect addressing the status of y may, instead of being in flag F10 at address A0, be in the flag of a prior word in a path leading to y. By following through the path defined by successive words until the first word with the status of yis accessed a decision can at this point be taken whether to continue along the path to y or to cause an interrupt, Fig. 3 (not shown). The flags F11, F12 .... for a number of variables y<SP>1</SP>, y<SP>2</SP>, ....., Fig. 4, in a work area PW may be gathered together in a keyword KW at the base address BW of the area. If the status of a variable is to be changed this is done by overwriting the present status in the relevant flag in keyword KW. If a variable yj is required the memory is addressed by specifying the base address BW and the relative address g<SP>2</SP> or yj. The base address part causes the keyword KW to be placed in output register UR, the flags being placed in register R, and the relative address part enables the status of yj to be read out from flag F1j in register R. Fig. 5 illustrates indirect addressing in which a keyword at address b1 is in the working memory of a computer whereas work area B 1 is in a backing store. Since b1 contains the flags, e.g. Flyl, Fly2 of variables, e.g. y<SP>1</SP>, y<SP>2</SP> in B1 the status of a variable can be determined or altered without obtaining B1 from the backing store. The word at b1 may also indicate the address, e.g. al of a word indicating the work area A1 which lies one level higher in the path of a blockstructured program, Fig. 6 (not shown). A page table (PT) indicating the page on which a required work area (WP) lies may include a keyword indicating both the page address (AWP) and the status (Fls) of each of the variables (y<SP>1</SP>, y<SP>2</SP>) in that area, Fig. 7 (not shown). Since a change from one status (other than apu) to status apu is determined by a change in a variable upon which the variables depend the flags of all the variables are preferably arranged to be changed simultaneously. To this end each flag is divided into first and second parts. The first parts, indicating apu or apu status of each variable, are placed in fields f1, f2, ... of a keyword KW, Fig. 8. The exclusion of the second parts from KW prevents this keyword from being impractically large. Fields Fld1, Fld2, ... contain the second parts r1, r2, ... of the flags, indicating the status, e.g. bu, ua .... of the variable. In another arrangement, Fig. 9 (not shown), each variable (dl, d2 ...) in a work area (D) has its flag (Fld1, Fld2, ...) divided in two parts as described above. The first part (f1, f2 ...) of each variable may be read out or written in simultaneously via a register (ER) transverse to the normal input register (IR).