FR108891A - - Google Patents

Info

Publication number
FR108891A
FR108891A FR108891DA FR108891A FR 108891 A FR108891 A FR 108891A FR 108891D A FR108891D A FR 108891DA FR 108891 A FR108891 A FR 108891A
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
Other languages
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication of FR108891A publication Critical patent/FR108891A/fr
Active legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1081Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Bus Control (AREA)
FR108891D 1973-01-18 Active FR108891A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19732302379 DE2302379C3 (en) 1973-01-18 1973-01-18 Circuit arrangement for performing sequentially running input / output operations in a data processing system working with virtual addressing
DE19732314070 DE2314070C3 (en) 1973-01-18 1973-03-21 Method and circuit arrangement for creating the entries of a linked list memory in a method and a circuit arrangement for performing sequentially running input / output operations in a data processing system operating with virtual addressing
DE19742444406 DE2444406A1 (en) 1973-01-18 1974-09-17 METHOD FOR PERFORMING INPUT / OUTPUT OPERATIONS IN A DATA PROCESSING SYSTEM WORKING WITH VIRTUAL ADDRESSING

Publications (1)

Publication Number Publication Date
FR108891A true FR108891A (en)

Family

ID=27184986

Family Applications (4)

Application Number Title Priority Date Filing Date
FR108891D Active FR108891A (en) 1973-01-18
FR7401140A Expired FR2214923B1 (en) 1973-01-18 1974-01-14
FR7409060A Expired FR2222696B2 (en) 1973-01-18 1974-03-18
FR7527583A Granted FR2285658A2 (en) 1973-01-18 1975-09-09 PROCEDURE AND CIRCUIT FOR PERFORMING INPUT / OUTPUT OPERATIONS TAKING PLACE IN SEQUENCE IN A DATA PROCESSING INSTALLATION WHICH OPERATES WITH VIRTUAL ADDRESSING

Family Applications After (3)

Application Number Title Priority Date Filing Date
FR7401140A Expired FR2214923B1 (en) 1973-01-18 1974-01-14
FR7409060A Expired FR2222696B2 (en) 1973-01-18 1974-03-18
FR7527583A Granted FR2285658A2 (en) 1973-01-18 1975-09-09 PROCEDURE AND CIRCUIT FOR PERFORMING INPUT / OUTPUT OPERATIONS TAKING PLACE IN SEQUENCE IN A DATA PROCESSING INSTALLATION WHICH OPERATES WITH VIRTUAL ADDRESSING

Country Status (6)

Country Link
BE (3) BE809930A (en)
DE (3) DE2302379C3 (en)
FR (4) FR2214923B1 (en)
GB (2) GB1447680A (en)
LU (2) LU69174A1 (en)
NL (3) NL7400649A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2437300A1 (en) * 1978-09-26 1980-04-25 Cii Honeywell Bull Stored data checking technique - determines whether items are within page limits by using address calculator which performs addition or subtraction from origin

Also Published As

Publication number Publication date
BE809930A (en) 1974-07-18
BE812640R (en) 1974-09-23
FR2214923A1 (en) 1974-08-19
DE2302379A1 (en) 1974-08-15
FR2285658B2 (en) 1978-09-08
DE2444406A1 (en) 1976-03-25
NL7403609A (en) 1974-09-24
FR2285658A2 (en) 1976-04-16
FR2222696B2 (en) 1978-09-08
DE2314070A1 (en) 1974-10-10
GB1454357A (en) 1976-11-03
BE833520R (en) 1976-03-17
NL7400649A (en) 1974-07-22
FR2222696A2 (en) 1974-10-18
LU69174A1 (en) 1974-04-08
GB1447680A (en) 1976-08-25
DE2302379C3 (en) 1978-12-07
NL7510623A (en) 1976-03-19
DE2314070C3 (en) 1980-08-07
DE2314070B2 (en) 1979-11-29
DE2302379B2 (en) 1977-03-31
LU69663A1 (en) 1974-10-17
FR2214923B1 (en) 1978-08-04

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