GB1393124A - Frequency synthesiser - Google Patents

Frequency synthesiser

Info

Publication number
GB1393124A
GB1393124A GB2611072A GB2611072A GB1393124A GB 1393124 A GB1393124 A GB 1393124A GB 2611072 A GB2611072 A GB 2611072A GB 2611072 A GB2611072 A GB 2611072A GB 1393124 A GB1393124 A GB 1393124A
Authority
GB
United Kingdom
Prior art keywords
frequency
stable
input
oscillator
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2611072A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Dassault Electronique SA
Electronique Marcal Dassault SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dassault Electronique SA, Electronique Marcal Dassault SA filed Critical Dassault Electronique SA
Publication of GB1393124A publication Critical patent/GB1393124A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
GB2611072A 1971-06-14 1972-06-05 Frequency synthesiser Expired GB1393124A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7121508A FR2142134A5 (enrdf_load_stackoverflow) 1971-06-14 1971-06-14

Publications (1)

Publication Number Publication Date
GB1393124A true GB1393124A (en) 1975-05-07

Family

ID=9078600

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2611072A Expired GB1393124A (en) 1971-06-14 1972-06-05 Frequency synthesiser

Country Status (12)

Country Link
JP (1) JPS535031B1 (enrdf_load_stackoverflow)
BE (1) BE784152A (enrdf_load_stackoverflow)
CA (1) CA965849A (enrdf_load_stackoverflow)
CH (1) CH557113A (enrdf_load_stackoverflow)
DE (1) DE2227698B2 (enrdf_load_stackoverflow)
ES (1) ES403830A1 (enrdf_load_stackoverflow)
FR (1) FR2142134A5 (enrdf_load_stackoverflow)
GB (1) GB1393124A (enrdf_load_stackoverflow)
IL (1) IL39601A (enrdf_load_stackoverflow)
IT (1) IT956134B (enrdf_load_stackoverflow)
NL (1) NL7207720A (enrdf_load_stackoverflow)
ZA (1) ZA723942B (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0041561A4 (en) * 1979-12-13 1982-04-29 Gen Electric PHASE CONTROL CIRCUIT STABILIZED BY A QUARTZ OSCILLATOR.
EP0793348A1 (en) * 1996-02-29 1997-09-03 Nec Corporation Phase lock loop circuit

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL163396C (nl) * 1974-04-22 1980-08-15 Philips Nv Meerkanaalgenerator.
JPS52149739U (enrdf_load_stackoverflow) * 1976-05-08 1977-11-14
DE2910727C2 (de) * 1979-03-19 1983-11-03 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur Modulation der Phase einer Trägerschwingung
US4634987A (en) * 1984-10-01 1987-01-06 Sundstrand Data Control, Inc. Frequency multiplier
JP2861542B2 (ja) * 1991-10-25 1999-02-24 日本電気株式会社 位相ロックループシンセサイザ

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0041561A4 (en) * 1979-12-13 1982-04-29 Gen Electric PHASE CONTROL CIRCUIT STABILIZED BY A QUARTZ OSCILLATOR.
EP0793348A1 (en) * 1996-02-29 1997-09-03 Nec Corporation Phase lock loop circuit
US5831481A (en) * 1996-02-29 1998-11-03 Nec Corporation Phase lock loop circuit having a broad loop band and small step frequency

Also Published As

Publication number Publication date
IL39601A (en) 1975-05-22
IT956134B (it) 1973-10-10
FR2142134A5 (enrdf_load_stackoverflow) 1973-01-26
ES403830A1 (es) 1976-01-01
DE2227698B2 (de) 1978-05-11
JPS535031B1 (enrdf_load_stackoverflow) 1978-02-23
NL7207720A (enrdf_load_stackoverflow) 1972-12-18
BE784152A (fr) 1972-11-30
DE2227698A1 (de) 1972-12-21
ZA723942B (en) 1973-03-28
CA965849A (en) 1975-04-08
CH557113A (fr) 1974-12-13
IL39601A0 (en) 1972-08-30

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee