GB1360996A - Semiconductor device and method for manufacture - Google Patents
Semiconductor device and method for manufactureInfo
- Publication number
- GB1360996A GB1360996A GB1918471*[A GB1918471A GB1360996A GB 1360996 A GB1360996 A GB 1360996A GB 1918471 A GB1918471 A GB 1918471A GB 1360996 A GB1360996 A GB 1360996A
- Authority
- GB
- United Kingdom
- Prior art keywords
- semi
- islands
- conductor
- june
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
Landscapes
- Element Separation (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5100070 | 1970-06-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1360996A true GB1360996A (en) | 1974-07-24 |
Family
ID=12874501
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1918471*[A Expired GB1360996A (en) | 1970-06-15 | 1971-06-07 | Semiconductor device and method for manufacture |
| GB785274A Expired GB1362512A (en) | 1970-06-15 | 1971-06-07 | Semiconductor device and method for manufacture |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB785274A Expired GB1362512A (en) | 1970-06-15 | 1971-06-07 | Semiconductor device and method for manufacture |
Country Status (4)
| Country | Link |
|---|---|
| DE (1) | DE2129676A1 (cg-RX-API-DMAC7.html) |
| FR (1) | FR2095258B1 (cg-RX-API-DMAC7.html) |
| GB (2) | GB1360996A (cg-RX-API-DMAC7.html) |
| NL (1) | NL7108101A (cg-RX-API-DMAC7.html) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19643143C2 (de) * | 1996-10-18 | 2002-06-20 | Inventa Ag | Haftvermittler für Polyamid-Verbunde, Verfahren zu deren Herstellung sowie deren Verwendung |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1086607A (en) * | 1965-06-03 | 1967-10-11 | Ncr Co | Method of electrically isolating components in solid-state electronic circuits |
| NL153374B (nl) * | 1966-10-05 | 1977-05-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze. |
-
1971
- 1971-06-07 GB GB1918471*[A patent/GB1360996A/en not_active Expired
- 1971-06-07 GB GB785274A patent/GB1362512A/en not_active Expired
- 1971-06-14 FR FR7121453A patent/FR2095258B1/fr not_active Expired
- 1971-06-14 NL NL7108101A patent/NL7108101A/xx unknown
- 1971-06-15 DE DE19712129676 patent/DE2129676A1/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| FR2095258A1 (cg-RX-API-DMAC7.html) | 1972-02-11 |
| GB1362512A (en) | 1974-08-07 |
| FR2095258B1 (cg-RX-API-DMAC7.html) | 1977-04-22 |
| DE2129676A1 (de) | 1972-02-10 |
| NL7108101A (cg-RX-API-DMAC7.html) | 1971-12-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PLNP | Patent lapsed through nonpayment of renewal fees |