GB1360130A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1360130A
GB1360130A GB2438072A GB2438072A GB1360130A GB 1360130 A GB1360130 A GB 1360130A GB 2438072 A GB2438072 A GB 2438072A GB 2438072 A GB2438072 A GB 2438072A GB 1360130 A GB1360130 A GB 1360130A
Authority
GB
United Kingdom
Prior art keywords
layer
region
type
monocrystalline
apertures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2438072A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1360130A publication Critical patent/GB1360130A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/20Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/051Manufacture or treatment of vertical BJTs
    • H10D10/054Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/271Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2905Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/018Manufacture or treatment of isolation regions comprising dielectric materials using selective deposition of crystalline silicon, e.g. using epitaxial growth of silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/037Diffusion-deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/043Dual dielectric
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/122Polycrystalline
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/969Simultaneous formation of monocrystalline and polycrystalline regions

Landscapes

  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Electrodes Of Semiconductors (AREA)
GB2438072A 1971-06-18 1972-05-24 Semiconductor devices Expired GB1360130A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15445571A 1971-06-18 1971-06-18

Publications (1)

Publication Number Publication Date
GB1360130A true GB1360130A (en) 1974-07-17

Family

ID=22551425

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2438072A Expired GB1360130A (en) 1971-06-18 1972-05-24 Semiconductor devices

Country Status (7)

Country Link
US (1) US3796613A (OSRAM)
JP (1) JPS5140790B1 (OSRAM)
CA (1) CA976666A (OSRAM)
DE (1) DE2223699A1 (OSRAM)
FR (1) FR2141938B1 (OSRAM)
GB (1) GB1360130A (OSRAM)
IT (1) IT956495B (OSRAM)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132017A (en) * 1982-12-16 1984-06-27 Secr Defence Semiconductor device array
GB2253276A (en) * 1991-01-31 1992-09-02 Rolls Royce Plc Fluid shear stress transducer

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL170901C (nl) * 1971-04-03 1983-01-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
US3947299A (en) * 1971-05-22 1976-03-30 U.S. Philips Corporation Method of manufacturing semiconductor devices
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
NL161301C (nl) * 1972-12-29 1980-01-15 Philips Nv Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan.
US3956033A (en) * 1974-01-03 1976-05-11 Motorola, Inc. Method of fabricating an integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector
US3913124A (en) * 1974-01-03 1975-10-14 Motorola Inc Integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector including fabrication method therefor
NL180466C (nl) * 1974-03-15 1987-02-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam voorzien van een in het halfgeleiderlichaam verzonken patroon van isolerend materiaal.
US4074304A (en) * 1974-10-04 1978-02-14 Nippon Electric Company, Ltd. Semiconductor device having a miniature junction area and process for fabricating same
US3972754A (en) * 1975-05-30 1976-08-03 Ibm Corporation Method for forming dielectric isolation in integrated circuits
DE2849373A1 (de) * 1977-11-14 1979-05-17 Tokyo Shibaura Electric Co Verfahren zur herstellung einer halbleitervorrichtung
JPS5539677A (en) * 1978-09-14 1980-03-19 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device and its manufacturing
US4252581A (en) * 1979-10-01 1981-02-24 International Business Machines Corporation Selective epitaxy method for making filamentary pedestal transistor
US4303933A (en) * 1979-11-29 1981-12-01 International Business Machines Corporation Self-aligned micrometer bipolar transistor device and process
US4333227A (en) * 1979-11-29 1982-06-08 International Business Machines Corporation Process for fabricating a self-aligned micrometer bipolar transistor device
US4269631A (en) * 1980-01-14 1981-05-26 International Business Machines Corporation Selective epitaxy method using laser annealing for making filamentary transistors
US4338138A (en) * 1980-03-03 1982-07-06 International Business Machines Corporation Process for fabricating a bipolar transistor
DE3016553A1 (de) * 1980-04-29 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Planartransistor, insbesondere fuer i(pfeil hoch)2(pfeil hoch) l-strukturen
US4487639A (en) * 1980-09-26 1984-12-11 Texas Instruments Incorporated Localized epitaxy for VLSI devices
JPS5873156A (ja) * 1981-10-28 1983-05-02 Hitachi Ltd 半導体装置
US4462847A (en) * 1982-06-21 1984-07-31 Texas Instruments Incorporated Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition
JPS59161867A (ja) * 1983-03-07 1984-09-12 Hitachi Ltd 半導体装置
US4568601A (en) * 1984-10-19 1986-02-04 International Business Machines Corporation Use of radiation sensitive polymerizable oligomers to produce polyimide negative resists and planarized dielectric components for semiconductor structures
US4728624A (en) * 1985-10-31 1988-03-01 International Business Machines Corporation Selective epitaxial growth structure and isolation
DE19845787A1 (de) * 1998-09-21 2000-03-23 Inst Halbleiterphysik Gmbh Bipolartransistor und Verfahren zu seiner Herstellung

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132017A (en) * 1982-12-16 1984-06-27 Secr Defence Semiconductor device array
GB2253276A (en) * 1991-01-31 1992-09-02 Rolls Royce Plc Fluid shear stress transducer

Also Published As

Publication number Publication date
CA976666A (en) 1975-10-21
FR2141938A1 (OSRAM) 1973-01-26
FR2141938B1 (OSRAM) 1978-03-03
IT956495B (it) 1973-10-10
DE2223699A1 (de) 1972-12-21
JPS5140790B1 (OSRAM) 1976-11-05
US3796613A (en) 1974-03-12

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee