IT956495B - Metodo perfezionato per la fabbri cazione di dispositivi semicondut tori - Google Patents
Metodo perfezionato per la fabbri cazione di dispositivi semicondut toriInfo
- Publication number
- IT956495B IT956495B IT25585/72A IT2558572A IT956495B IT 956495 B IT956495 B IT 956495B IT 25585/72 A IT25585/72 A IT 25585/72A IT 2558572 A IT2558572 A IT 2558572A IT 956495 B IT956495 B IT 956495B
- Authority
- IT
- Italy
- Prior art keywords
- making
- semiconductive devices
- perfected method
- perfected
- semiconductive
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
- H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/969—Simultaneous formation of monocrystalline and polycrystalline regions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Element Separation (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15445571A | 1971-06-18 | 1971-06-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IT956495B true IT956495B (it) | 1973-10-10 |
Family
ID=22551425
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT25585/72A IT956495B (it) | 1971-06-18 | 1972-06-13 | Metodo perfezionato per la fabbri cazione di dispositivi semicondut tori |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3796613A (it) |
| JP (1) | JPS5140790B1 (it) |
| CA (1) | CA976666A (it) |
| DE (1) | DE2223699A1 (it) |
| FR (1) | FR2141938B1 (it) |
| GB (1) | GB1360130A (it) |
| IT (1) | IT956495B (it) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL170901C (nl) * | 1971-04-03 | 1983-01-03 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
| NL166156C (nl) * | 1971-05-22 | 1981-06-15 | Philips Nv | Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan. |
| US3947299A (en) * | 1971-05-22 | 1976-03-30 | U.S. Philips Corporation | Method of manufacturing semiconductor devices |
| NL161301C (nl) * | 1972-12-29 | 1980-01-15 | Philips Nv | Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan. |
| US3956033A (en) * | 1974-01-03 | 1976-05-11 | Motorola, Inc. | Method of fabricating an integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector |
| US3913124A (en) * | 1974-01-03 | 1975-10-14 | Motorola Inc | Integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector including fabrication method therefor |
| NL180466C (nl) * | 1974-03-15 | 1987-02-16 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam voorzien van een in het halfgeleiderlichaam verzonken patroon van isolerend materiaal. |
| US4074304A (en) * | 1974-10-04 | 1978-02-14 | Nippon Electric Company, Ltd. | Semiconductor device having a miniature junction area and process for fabricating same |
| US3972754A (en) * | 1975-05-30 | 1976-08-03 | Ibm Corporation | Method for forming dielectric isolation in integrated circuits |
| DE2849373A1 (de) * | 1977-11-14 | 1979-05-17 | Tokyo Shibaura Electric Co | Verfahren zur herstellung einer halbleitervorrichtung |
| JPS5539677A (en) * | 1978-09-14 | 1980-03-19 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor device and its manufacturing |
| US4252581A (en) * | 1979-10-01 | 1981-02-24 | International Business Machines Corporation | Selective epitaxy method for making filamentary pedestal transistor |
| US4303933A (en) * | 1979-11-29 | 1981-12-01 | International Business Machines Corporation | Self-aligned micrometer bipolar transistor device and process |
| US4333227A (en) * | 1979-11-29 | 1982-06-08 | International Business Machines Corporation | Process for fabricating a self-aligned micrometer bipolar transistor device |
| US4269631A (en) * | 1980-01-14 | 1981-05-26 | International Business Machines Corporation | Selective epitaxy method using laser annealing for making filamentary transistors |
| US4338138A (en) * | 1980-03-03 | 1982-07-06 | International Business Machines Corporation | Process for fabricating a bipolar transistor |
| DE3016553A1 (de) * | 1980-04-29 | 1981-11-05 | Siemens AG, 1000 Berlin und 8000 München | Planartransistor, insbesondere fuer i(pfeil hoch)2(pfeil hoch) l-strukturen |
| US4487639A (en) * | 1980-09-26 | 1984-12-11 | Texas Instruments Incorporated | Localized epitaxy for VLSI devices |
| JPS5873156A (ja) * | 1981-10-28 | 1983-05-02 | Hitachi Ltd | 半導体装置 |
| US4462847A (en) * | 1982-06-21 | 1984-07-31 | Texas Instruments Incorporated | Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition |
| GB2132017B (en) * | 1982-12-16 | 1986-12-03 | Secr Defence | Semiconductor device array |
| JPS59161867A (ja) * | 1983-03-07 | 1984-09-12 | Hitachi Ltd | 半導体装置 |
| US4568601A (en) * | 1984-10-19 | 1986-02-04 | International Business Machines Corporation | Use of radiation sensitive polymerizable oligomers to produce polyimide negative resists and planarized dielectric components for semiconductor structures |
| US4728624A (en) * | 1985-10-31 | 1988-03-01 | International Business Machines Corporation | Selective epitaxial growth structure and isolation |
| GB2253276A (en) * | 1991-01-31 | 1992-09-02 | Rolls Royce Plc | Fluid shear stress transducer |
| DE19845787A1 (de) * | 1998-09-21 | 2000-03-23 | Inst Halbleiterphysik Gmbh | Bipolartransistor und Verfahren zu seiner Herstellung |
-
1971
- 1971-06-18 US US00154455A patent/US3796613A/en not_active Expired - Lifetime
-
1972
- 1972-04-07 JP JP47034577A patent/JPS5140790B1/ja active Pending
- 1972-05-16 DE DE19722223699 patent/DE2223699A1/de not_active Withdrawn
- 1972-05-24 GB GB2438072A patent/GB1360130A/en not_active Expired
- 1972-06-05 FR FR7221478A patent/FR2141938B1/fr not_active Expired
- 1972-06-08 CA CA144,164A patent/CA976666A/en not_active Expired
- 1972-06-13 IT IT25585/72A patent/IT956495B/it active
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5140790B1 (it) | 1976-11-05 |
| FR2141938B1 (it) | 1978-03-03 |
| CA976666A (en) | 1975-10-21 |
| GB1360130A (en) | 1974-07-17 |
| FR2141938A1 (it) | 1973-01-26 |
| US3796613A (en) | 1974-03-12 |
| DE2223699A1 (de) | 1972-12-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| IT956495B (it) | Metodo perfezionato per la fabbri cazione di dispositivi semicondut tori | |
| IT1001592B (it) | Metodo perfezionato per la fabbri cazione di dispositivi semicondut tori al silicio | |
| IT959236B (it) | Metodo per la giunzione di cartoni | |
| IT1032591B (it) | Procedimento per la fabbricazione di dispostivi semiconduttori | |
| IT1012364B (it) | Procedimento perfezionato per la fabbricazione di dispositivi semi conduttori | |
| IT951436B (it) | Procedimento per la preparazione di poliimidi | |
| IT959917B (it) | Struttura semiconduttrice perfezionata | |
| BG20582A3 (bg) | Метод за получаване на р-халоген-фенил-2-пиромидинони | |
| IT968764B (it) | Metodo per la eliminazione di zolfo | |
| IT976112B (it) | Procedimento per la fabbricazione di dispositivi semiconduttori | |
| IT969828B (it) | Struttura semiconduttride perfezionata | |
| SU474150A3 (ru) | Способ получени производных окса-1-диаза-3,8-спиро-(4,5)-декана | |
| BG20336A3 (bg) | Метод за получаване на 3-карбомоил-2.4.6- трийдефинил-алкилетери | |
| AR199084A1 (es) | Procedimiento para la obtencion de derivados 2-nitroimidazol | |
| BG19799A3 (bg) | Метод за получаване на 3,4-дихидро-2н-изохинолин-1-они | |
| IT972869B (it) | Procedimento per la preparazione di perfluoroalchilioduri | |
| AR192914A1 (es) | Procedimiento para la obtencion de compuesto yodoetinilicos | |
| IT987426B (it) | Procedimento perfezionato per la fabbricazione di dispositivi semi conduttori | |
| IT960605B (it) | Procedimento per la preparazione di glicidileteri | |
| IT974902B (it) | Procedimento per la fabbricazione di derivati di 2 idrossiben zofenone | |
| BG19133A3 (bg) | Метод за получаване на 1-фенил-2-хидрокси-3-хидроксилалкиламинопропани | |
| AR193078A1 (es) | Metodo para la preparacion de 2,4-diamino-bencilpirimidinas | |
| IT968446B (it) | Procedimento per la preparazione di alogemuri monoaloacetilici | |
| IT963103B (it) | Procedimento per la preparazione di n alchilcarbazoli | |
| AR197298A1 (es) | Procedimiento para la preparacion de piperidinas sustituidas |