GB1314923A - Method of manufacturing an insulated gate type field effect device - Google Patents

Method of manufacturing an insulated gate type field effect device

Info

Publication number
GB1314923A
GB1314923A GB2779271A GB2779271A GB1314923A GB 1314923 A GB1314923 A GB 1314923A GB 2779271 A GB2779271 A GB 2779271A GB 2779271 A GB2779271 A GB 2779271A GB 1314923 A GB1314923 A GB 1314923A
Authority
GB
United Kingdom
Prior art keywords
oxide layer
regions
manufacturing
field effect
type field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2779271A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of GB1314923A publication Critical patent/GB1314923A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

1314923 Semi-conductor devices HITACHI Ltd 14 June 1971 [15 June 1970] 27792/71 Heading H1K An IGFET in an integrated circuit is bounded by an oxide passivating layer 3 inset into the semi-conductor body 1, preferably to a depth greater than that of the source and drain regions 4, 5, and a conductive track extends from at least one of the regions 4, 5 on to the oxide layer 3. The oxide layer 3 is formed by thermal oxidation through a silicon nitrile mask, and the regions 4, 5 are formed by B- diffusion through windows opened in the nitride mask after the selective oxidation step. Finally the remainder of the nitride mask is removed, a thin gate oxide layer 7 is formed and Al source, gate and drain electrodes S, G, D are provided.
GB2779271A 1970-06-15 1971-06-14 Method of manufacturing an insulated gate type field effect device Expired GB1314923A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5100170 1970-06-15

Publications (1)

Publication Number Publication Date
GB1314923A true GB1314923A (en) 1973-04-26

Family

ID=12874527

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2779271A Expired GB1314923A (en) 1970-06-15 1971-06-14 Method of manufacturing an insulated gate type field effect device

Country Status (3)

Country Link
DE (1) DE2128470A1 (en)
FR (1) FR2095259B1 (en)
GB (1) GB1314923A (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL152707B (en) * 1967-06-08 1977-03-15 Philips Nv SEMICONDUCTOR CONTAINING A FIELD EFFECT TRANSISTOR OF THE TYPE WITH INSULATED PORT ELECTRODE AND PROCESS FOR MANUFACTURE THEREOF.

Also Published As

Publication number Publication date
DE2128470A1 (en) 1972-01-20
FR2095259B1 (en) 1975-07-11
FR2095259A1 (en) 1972-02-11

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees