GB1312429A - Monolithic memory cell - Google Patents

Monolithic memory cell

Info

Publication number
GB1312429A
GB1312429A GB1286171A GB1286172A GB1312429A GB 1312429 A GB1312429 A GB 1312429A GB 1286171 A GB1286171 A GB 1286171A GB 1286172 A GB1286172 A GB 1286172A GB 1312429 A GB1312429 A GB 1312429A
Authority
GB
United Kingdom
Prior art keywords
transistors
memory cell
cell
transistor
insulated gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1286171A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1312429A publication Critical patent/GB1312429A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/12Static random access memory [SRAM] devices comprising a MOSFET load element

Abstract

1312429 Memory cell array INTERNATIONAL BUSINESS MACHINES CORP 20 March 1972 [14 April 1971] 12861/72 Heading G4C [Also in Division H3] A memory cell of two insulated gate fieldeffect transistors 11, 12 intercoupled drain-togate has two load insulated gate field-effect transistors 22, 23 each with thicker gate-channel insulation then that of the transistors 11, 12. A transistor 31 is parasitic and is formed by a conductor 35<SP>1</SP> (Fig. 2, not shown), passing between doped regions 34 and 30 when the cell is of integrated form. It is maintained off, when transistors 22, 23 are turned on, by voltage on line 30 which increases the threshold of the transistor 31. The cell has bit/sense lines 39, 40 and a plurality of such cells may be formed in one monolithic silicon body (Fig. 3, not shown) to form a memory array.
GB1286171A 1971-04-14 1972-03-20 Monolithic memory cell Expired GB1312429A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13401071A 1971-04-14 1971-04-14

Publications (1)

Publication Number Publication Date
GB1312429A true GB1312429A (en) 1973-04-04

Family

ID=22461347

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1286171A Expired GB1312429A (en) 1971-04-14 1972-03-20 Monolithic memory cell

Country Status (3)

Country Link
DE (1) DE2216062A1 (en)
FR (1) FR2133582B1 (en)
GB (1) GB1312429A (en)

Also Published As

Publication number Publication date
DE2216062A1 (en) 1972-10-26
FR2133582A1 (en) 1972-12-01
FR2133582B1 (en) 1976-08-06

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee