GB1311685A - Transistors - Google Patents

Transistors

Info

Publication number
GB1311685A
GB1311685A GB2005670A GB2005670A GB1311685A GB 1311685 A GB1311685 A GB 1311685A GB 2005670 A GB2005670 A GB 2005670A GB 2005670 A GB2005670 A GB 2005670A GB 1311685 A GB1311685 A GB 1311685A
Authority
GB
United Kingdom
Prior art keywords
igfet
gate insulation
oxygen
silicon
verwaltungs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2005670A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of GB1311685A publication Critical patent/GB1311685A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

1311685 IGFET gate insulation LICENTIA PATENT-VERWALTUNGS-GmbH 27 April 1970 [7 May 1969] 20056/70 Heading H1K The gate insulation of an IGFET is of titanium dioxide, niobium pentoxide, tantalum pentoxide, or zirconium dioxide and is deposited on the semi-conductor body by hydrolysis of the appropriate chloride. When the semiconductor body is of silicon the structure thus formed may be tempered in oxygen at 700- 1000‹ C. to form a silicon oxide layer under the other oxide by oxygen diffusion.
GB2005670A 1969-05-07 1970-04-27 Transistors Expired GB1311685A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691923279 DE1923279A1 (en) 1969-05-07 1969-05-07 Transistor with an isolated control electrode

Publications (1)

Publication Number Publication Date
GB1311685A true GB1311685A (en) 1973-03-28

Family

ID=5733486

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2005670A Expired GB1311685A (en) 1969-05-07 1970-04-27 Transistors

Country Status (2)

Country Link
DE (1) DE1923279A1 (en)
GB (1) GB1311685A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001075956A1 (en) * 2000-03-30 2001-10-11 Tokyo Electron Limited Method of forming a dielectric film

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2405620C2 (en) * 1974-02-06 1985-02-21 Siegenia-Frank Kg, 5900 Siegen Corner bearings for windows, doors or the like, in particular with tilt and turn sashes
JPH0722183B2 (en) * 1981-10-09 1995-03-08 富士通株式会社 Method for manufacturing dielectric layer for semiconductor device
DE3235177A1 (en) * 1982-09-23 1984-03-29 Lapp-Finze Eisenwarenfabriken AG, 8401 Karlsdorf, Graz Corner bearing of a turn-and-tilt wing
FR2545989B1 (en) * 1983-05-10 1985-07-05 Thomson Csf FIELD EFFECT TRANSISTOR, OPERATING IN ENRICHMENT
US6222240B1 (en) * 1998-07-22 2001-04-24 Advanced Micro Devices, Inc. Salicide and gate dielectric formed from a single layer of refractory metal
US6140167A (en) * 1998-08-18 2000-10-31 Advanced Micro Devices, Inc. High performance MOSFET and method of forming the same using silicidation and junction implantation prior to gate formation
US6410967B1 (en) 1998-10-15 2002-06-25 Advanced Micro Devices, Inc. Transistor having enhanced metal silicide and a self-aligned gate electrode
US6084280A (en) * 1998-10-15 2000-07-04 Advanced Micro Devices, Inc. Transistor having a metal silicide self-aligned to the gate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001075956A1 (en) * 2000-03-30 2001-10-11 Tokyo Electron Limited Method of forming a dielectric film
US6866890B2 (en) 2000-03-30 2005-03-15 Tokyo Electron Limited Method of forming a dielectric film

Also Published As

Publication number Publication date
DE1923279A1 (en) 1970-12-23

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees