GB1303851A - - Google Patents

Info

Publication number
GB1303851A
GB1303851A GB1303851DA GB1303851A GB 1303851 A GB1303851 A GB 1303851A GB 1303851D A GB1303851D A GB 1303851DA GB 1303851 A GB1303851 A GB 1303851A
Authority
GB
United Kingdom
Prior art keywords
mask
layer
metal
hole
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1303851A publication Critical patent/GB1303851A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09436Pads or lands on permanent coating which covers the other conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/054Continuous temporary metal layer over resist, e.g. for selective electroplating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377Protective layers
    • H05K2203/1383Temporary protective insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

1303851 Printed circuits PHOTOCIRCUITS CORP 9 March 1970 11089/70 Heading H1R A method of making a printed circuit board provided with holes having metallized hole walls the surface of the said board being completely or substantially completely free of exposed conductor lines, which comprises the steps of establishing metallic conductor lines forming one or more printed circuit patterns in one or more planes of an insulating base; substantially covering exposed conductor lines of the circuit pattern or patterns on the surface plane or planes with a non-removable, insulating mask, the said mask covering completely or substantially completely all of the exposed surface of the said base; establishing a thin layer of metal on the surface of said non-removable mask, said metal layer being provided with a superimposed, temporary, insulating layer or coating, prior to or after establishing the said thin metal layer providing at least one hole extending through the board; providing a thin layer of metal on all exposed hole walls; forming an additional metal deposit on the hole walls by electroplating, the said additional metal deposit extending substantially to the exterior surface of the mask and this way forming a small ring-like metal deposit or land on the horizontal surface of the edge of a mask surrounding the hole or holes, and subsequently removing said temporary insulating layer or coating and the said thin layer of metal on the surface of the permanent mask. An insulating base 3000, Fig. 1D, clad with a metal layer and etched to form circuits 3004, 3006 is coated all over with an insulating, solder resistant layer 3010. Holes 3014 are then made through the base and a thin electroless plating 3016 is applied after sensitization with stannous ions, amine boranes or alkali borohydrides together with palladium ions. After applying a strippable mask 3020 the holes and lands 3015, Fig. IE, are built up by electrolytic deposition. The mask 3020 is then removed. In another embodiment, Fig. 2H, before the hole 4023 is made, the insulating layer 4010 is electrolessly coated with metal 4016 and two removable masks 4018 and 4020 are applied. All exposed surfaces are then sensitized and the mask 4020 removed to leave only the hole wall sensitized for electroless deposition. The electrolessly through plated hole is built up electrolytically and the mask 4018 and layer 4016 are removed to leave lands 4022, 4024, Fig. 9K. The layer 4016 may be laminated on instead of electrolessly deposited.
GB1303851D 1970-03-09 1970-03-09 Expired GB1303851A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1108970 1970-03-09

Publications (1)

Publication Number Publication Date
GB1303851A true GB1303851A (en) 1973-01-24

Family

ID=9979841

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1303851D Expired GB1303851A (en) 1970-03-09 1970-03-09

Country Status (1)

Country Link
GB (1) GB1303851A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218761A (en) * 1991-04-08 1993-06-15 Nec Corporation Process for manufacturing printed wiring boards
GB2305299A (en) * 1995-09-12 1997-04-02 Irish Circuits Ltd Printed circuit board production process
US5799393A (en) * 1994-11-09 1998-09-01 Blaupunkt-Werke Gmbh Method for producing a plated-through hole on a printed-circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218761A (en) * 1991-04-08 1993-06-15 Nec Corporation Process for manufacturing printed wiring boards
US5799393A (en) * 1994-11-09 1998-09-01 Blaupunkt-Werke Gmbh Method for producing a plated-through hole on a printed-circuit board
GB2305299A (en) * 1995-09-12 1997-04-02 Irish Circuits Ltd Printed circuit board production process

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Legal Events

Date Code Title Description
48S Specification amended (sect. 8/1949)
49S Specification amended (sect. 9/1949)
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee