GB1299837A - Method of producing electrical interconnection patterns - Google Patents

Method of producing electrical interconnection patterns

Info

Publication number
GB1299837A
GB1299837A GB55959/71A GB5595971A GB1299837A GB 1299837 A GB1299837 A GB 1299837A GB 55959/71 A GB55959/71 A GB 55959/71A GB 5595971 A GB5595971 A GB 5595971A GB 1299837 A GB1299837 A GB 1299837A
Authority
GB
United Kingdom
Prior art keywords
layer
track pattern
coating
mask
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB55959/71A
Other languages
English (en)
Inventor
Rudolf August Herbert Heinecke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB55959/71A priority Critical patent/GB1299837A/en
Priority to ZA727342A priority patent/ZA727342B/xx
Priority to DE2257201A priority patent/DE2257201A1/de
Priority to FR7242337A priority patent/FR2162038B1/fr
Publication of GB1299837A publication Critical patent/GB1299837A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes

Landscapes

  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
GB55959/71A 1971-12-02 1971-12-02 Method of producing electrical interconnection patterns Expired GB1299837A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB55959/71A GB1299837A (en) 1971-12-02 1971-12-02 Method of producing electrical interconnection patterns
ZA727342A ZA727342B (en) 1971-12-02 1972-10-16 Method of producing electrical interconnection patterns
DE2257201A DE2257201A1 (de) 1971-12-02 1972-11-22 Verfahren zum herstellen eines elektrischen zwischenverbindungs-leiterzugmusters
FR7242337A FR2162038B1 (https=) 1971-12-02 1972-11-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB55959/71A GB1299837A (en) 1971-12-02 1971-12-02 Method of producing electrical interconnection patterns

Publications (1)

Publication Number Publication Date
GB1299837A true GB1299837A (en) 1972-12-13

Family

ID=10475337

Family Applications (1)

Application Number Title Priority Date Filing Date
GB55959/71A Expired GB1299837A (en) 1971-12-02 1971-12-02 Method of producing electrical interconnection patterns

Country Status (4)

Country Link
DE (1) DE2257201A1 (https=)
FR (1) FR2162038B1 (https=)
GB (1) GB1299837A (https=)
ZA (1) ZA727342B (https=)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2088595A5 (https=) * 1970-04-17 1972-01-07 Cii
US3700508A (en) * 1970-06-25 1972-10-24 Gen Instrument Corp Fabrication of integrated microcircuit devices

Also Published As

Publication number Publication date
ZA727342B (en) 1973-06-27
FR2162038B1 (https=) 1976-04-23
FR2162038A1 (https=) 1973-07-13
DE2257201A1 (de) 1973-06-14

Similar Documents

Publication Publication Date Title
US3839111A (en) Method of etching silicon oxide to produce a tapered edge thereon
ES381986A1 (es) Metodo para formar una pelicula compuesta sobre un sustrato.
GB1266000A (https=)
JPS5669835A (en) Method for forming thin film pattern
US3623961A (en) Method of providing an electric connection to a surface of an electronic device and device obtained by said method
GB1308359A (en) Multiple layer metal structure and processing
JPS5240969A (en) Process for production of semiconductor device
GB967002A (en) Improvements in or relating to semiconductor devices
GB1491746A (en) Making patterns by sputter etching
EP0178181A3 (en) Methods for producing an aperture in a surface
GB1299837A (en) Method of producing electrical interconnection patterns
US3526555A (en) Method of masking a semiconductor with a liftable metallic layer
JPS57145340A (en) Manufacture of semiconductor device
JPS5240968A (en) Process for production of semiconductor device
FR2399486A1 (fr) Procede de gravure d'une couche metallique par attaque ionique
JPS56148845A (en) Manufacture of semiconductor device
JPS6459936A (en) Manufacture of integrated circuit
JPS57176747A (en) Manufacture of semiconductor device
JPS54162490A (en) Manufacture of semiconductor device
JPS59926A (ja) アルミニウム膜の選択エツチング法
JPS56114355A (en) Manufacture of semiconductor device
JPS56130925A (en) Manufacture of semiconductor device
JPS5380167A (en) Manufacture of semiconductor device
JPS56130951A (en) Manufacture of semiconductor device
JPS5555546A (en) Method of wiring semiconductor device

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
746 Register noted 'licences of right' (sect. 46/1977)
PCNP Patent ceased through non-payment of renewal fee