GB1228903A - - Google Patents

Info

Publication number
GB1228903A
GB1228903A GB1228903DA GB1228903A GB 1228903 A GB1228903 A GB 1228903A GB 1228903D A GB1228903D A GB 1228903DA GB 1228903 A GB1228903 A GB 1228903A
Authority
GB
United Kingdom
Prior art keywords
array
tracks
semi
pads
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1228903A publication Critical patent/GB1228903A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/901Masterslice integrated circuits comprising bipolar technology
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/021Manufacture or treatment of air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/20Air gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07231Techniques
    • H10W72/07236Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/928Front and rear surface processing

Landscapes

  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
GB1228903D 1967-04-19 1968-04-17 Expired GB1228903A (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP42024517A JPS5144391B1 (enExample) 1967-04-19 1967-04-19

Publications (1)

Publication Number Publication Date
GB1228903A true GB1228903A (enExample) 1971-04-21

Family

ID=12140349

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1228903D Expired GB1228903A (enExample) 1967-04-19 1968-04-17

Country Status (3)

Country Link
US (1) US3566214A (enExample)
JP (1) JPS5144391B1 (enExample)
GB (1) GB1228903A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4310571A (en) 1978-04-28 1982-01-12 Sgs Ates, Componenti Elettronici S.P.A. Process for producing a calibrated resistance element
US5084323A (en) * 1989-04-07 1992-01-28 Nippondenso Co., Ltd. Ceramic multi-layer wiring substrate and process for preparation thereof
GB2274200A (en) * 1991-10-29 1994-07-13 Gen Electric A High density interconnect structure including a spacer structure and a gap

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4189342A (en) * 1971-10-07 1980-02-19 U.S. Philips Corporation Semiconductor device comprising projecting contact layers
US3913216A (en) * 1973-06-20 1975-10-21 Signetics Corp Method for fabricating a precision aligned semiconductor array
US3896473A (en) * 1973-12-04 1975-07-22 Bell Telephone Labor Inc Gallium arsenide schottky barrier avalance diode array
JPS5247686A (en) * 1975-10-15 1977-04-15 Toshiba Corp Semiconductor device and process for production of same
US4238763A (en) * 1977-08-10 1980-12-09 National Research Development Corporation Solid state microwave devices with small active contact and large passive contact
US4379307A (en) * 1980-06-16 1983-04-05 Rockwell International Corporation Integrated circuit chip transmission line
US4733290A (en) * 1986-04-18 1988-03-22 M/A-Com, Inc. Semiconductor device and method of fabrication
US5280194A (en) * 1988-11-21 1994-01-18 Micro Technology Partners Electrical apparatus with a metallic layer coupled to a lower region of a substrate and metallic layer coupled to a lower region of a semiconductor device
US5403729A (en) * 1992-05-27 1995-04-04 Micro Technology Partners Fabricating a semiconductor with an insulative coating
US5592022A (en) * 1992-05-27 1997-01-07 Chipscale, Inc. Fabricating a semiconductor with an insulative coating
US5656547A (en) * 1994-05-11 1997-08-12 Chipscale, Inc. Method for making a leadless surface mounted device with wrap-around flange interface contacts
GB2302452B (en) * 1994-06-09 1998-11-18 Chipscale Inc Resistor fabrication
US5552326A (en) * 1995-03-01 1996-09-03 Texas Instruments Incorporated Method for forming electrical contact to the optical coating of an infrared detector using conductive epoxy
CN101421842A (zh) * 2006-01-31 2009-04-29 固态冷却公司 高冷却率应用的热二极管式器件及其制造方法
JP5358089B2 (ja) * 2007-12-21 2013-12-04 スパンション エルエルシー 半導体装置
US8580675B2 (en) 2011-03-02 2013-11-12 Texas Instruments Incorporated Two-track cross-connect in double-patterned structure using rectangular via

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4310571A (en) 1978-04-28 1982-01-12 Sgs Ates, Componenti Elettronici S.P.A. Process for producing a calibrated resistance element
US5084323A (en) * 1989-04-07 1992-01-28 Nippondenso Co., Ltd. Ceramic multi-layer wiring substrate and process for preparation thereof
GB2274200A (en) * 1991-10-29 1994-07-13 Gen Electric A High density interconnect structure including a spacer structure and a gap
GB2274200B (en) * 1991-10-29 1996-03-20 Gen Electric A high density interconnect structure including a spacer structure and a gap

Also Published As

Publication number Publication date
JPS5144391B1 (enExample) 1976-11-27
US3566214A (en) 1971-02-23

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee