GB1202137A - Manufacture of integrated circuit - Google Patents

Manufacture of integrated circuit

Info

Publication number
GB1202137A
GB1202137A GB1960369A GB1960369A GB1202137A GB 1202137 A GB1202137 A GB 1202137A GB 1960369 A GB1960369 A GB 1960369A GB 1960369 A GB1960369 A GB 1960369A GB 1202137 A GB1202137 A GB 1202137A
Authority
GB
United Kingdom
Prior art keywords
units
gates
array
interconnected
carried out
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1960369A
Inventor
Thomas Meirion Jackson
Thomas John Rowe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB1960369A priority Critical patent/GB1202137A/en
Publication of GB1202137A publication Critical patent/GB1202137A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11801—Masterslice integrated circuits using bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

1,202,137. Integrated circuits. STANDARD TELEPHONES & CABLES Ltd. 17 April, 1969, No. 19603/69. Heading H1K. A semi-conductor slice is processed to contain many identical discrete functional circuit units. Further interconnections are provided to join all the units into an array of identical discrete functional modules, each comprising a plurality of adjacent units. Tests are carried out on the units before interconnection and are also carried out on the modules which are then separated by dicing and individually encapsulated and further tested. In the particular embodiment each module consists of a 3 x 2 array of units and each unit contains 3 DTL three-input gates (illustrated in Fig. 2, not shown). The units are metallized normally and are interconnected with one another by two further layers of metallization separated by appropriate insulating layers. The module uses seventeen of the gates provided by the interconnected units to provide a divider stage, with reset, for a PCM terminal and has two flip-flops with five additional gates (Fig. 1, not shown).
GB1960369A 1969-04-17 1969-04-17 Manufacture of integrated circuit Expired GB1202137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1960369A GB1202137A (en) 1969-04-17 1969-04-17 Manufacture of integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1960369A GB1202137A (en) 1969-04-17 1969-04-17 Manufacture of integrated circuit

Publications (1)

Publication Number Publication Date
GB1202137A true GB1202137A (en) 1970-08-12

Family

ID=10132122

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1960369A Expired GB1202137A (en) 1969-04-17 1969-04-17 Manufacture of integrated circuit

Country Status (1)

Country Link
GB (1) GB1202137A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2193259A1 (en) * 1972-07-17 1974-02-15 Hughes Aircraft Co
GB2168840A (en) * 1984-08-22 1986-06-25 Plessey Co Plc Customerisation of integrated logic devices

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2193259A1 (en) * 1972-07-17 1974-02-15 Hughes Aircraft Co
GB2168840A (en) * 1984-08-22 1986-06-25 Plessey Co Plc Customerisation of integrated logic devices

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees