GB1167305A - Improvements in or relating to Method for Making Thin Semiconductor Dice - Google Patents

Improvements in or relating to Method for Making Thin Semiconductor Dice

Info

Publication number
GB1167305A
GB1167305A GB07009/68A GB1700968A GB1167305A GB 1167305 A GB1167305 A GB 1167305A GB 07009/68 A GB07009/68 A GB 07009/68A GB 1700968 A GB1700968 A GB 1700968A GB 1167305 A GB1167305 A GB 1167305A
Authority
GB
United Kingdom
Prior art keywords
semi
wafer
glass
conductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB07009/68A
Other languages
English (en)
Inventor
Israel Arnold Lesk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of GB1167305A publication Critical patent/GB1167305A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H10D89/105—Integrated device layouts adapted for thermal considerations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/028—Dicing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Dicing (AREA)
GB07009/68A 1967-04-25 1968-04-09 Improvements in or relating to Method for Making Thin Semiconductor Dice Expired GB1167305A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63363167A 1967-04-25 1967-04-25
US79820968A 1968-09-03 1968-09-03

Publications (1)

Publication Number Publication Date
GB1167305A true GB1167305A (en) 1969-10-15

Family

ID=27091939

Family Applications (1)

Application Number Title Priority Date Filing Date
GB07009/68A Expired GB1167305A (en) 1967-04-25 1968-04-09 Improvements in or relating to Method for Making Thin Semiconductor Dice

Country Status (6)

Country Link
US (2) US3445925A (cg-RX-API-DMAC7.html)
BE (1) BE714119A (cg-RX-API-DMAC7.html)
DE (1) DE1764200A1 (cg-RX-API-DMAC7.html)
FR (1) FR1570699A (cg-RX-API-DMAC7.html)
GB (1) GB1167305A (cg-RX-API-DMAC7.html)
NL (1) NL6805665A (cg-RX-API-DMAC7.html)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599056A (en) * 1969-06-11 1971-08-10 Bell Telephone Labor Inc Semiconductor beam lead with thickened bonding portion
US3680205A (en) * 1970-03-03 1972-08-01 Dionics Inc Method of producing air-isolated integrated circuits
US3680184A (en) * 1970-05-05 1972-08-01 Gen Electric Method of making an electrostatic deflection electrode array
US3660732A (en) * 1971-02-08 1972-05-02 Signetics Corp Semiconductor structure with dielectric and air isolation and method
US3772100A (en) * 1971-06-30 1973-11-13 Denki Onkyo Co Ltd Method for forming strips on semiconductor device
FR2328286A1 (fr) * 1975-10-14 1977-05-13 Thomson Csf Procede de fabrication de dispositifs a semiconducteurs, presentant une tres faible resistance thermique, et dispositifs obtenus par ledit procede
EP0011418A1 (en) * 1978-11-20 1980-05-28 THE GENERAL ELECTRIC COMPANY, p.l.c. Manufacture of electroluminescent display devices
US4335501A (en) * 1979-10-31 1982-06-22 The General Electric Company Limited Manufacture of monolithic LED arrays for electroluminescent display devices
JPH01106466A (ja) * 1987-10-19 1989-04-24 Fujitsu Ltd 半導体装置の製造方法
US5354695A (en) 1992-04-08 1994-10-11 Leedy Glenn J Membrane dielectric isolation IC fabrication
US5280194A (en) * 1988-11-21 1994-01-18 Micro Technology Partners Electrical apparatus with a metallic layer coupled to a lower region of a substrate and metallic layer coupled to a lower region of a semiconductor device
US5091330A (en) * 1990-12-28 1992-02-25 Motorola, Inc. Method of fabricating a dielectric isolated area
US6714625B1 (en) * 1992-04-08 2004-03-30 Elm Technology Corporation Lithography device for semiconductor circuit pattern generation
US5403729A (en) * 1992-05-27 1995-04-04 Micro Technology Partners Fabricating a semiconductor with an insulative coating
US5592022A (en) * 1992-05-27 1997-01-07 Chipscale, Inc. Fabricating a semiconductor with an insulative coating
US5346848A (en) * 1993-06-01 1994-09-13 Motorola, Inc. Method of bonding silicon and III-V semiconductor materials
US5508231A (en) * 1994-03-07 1996-04-16 National Semiconductor Corporation Apparatus and method for achieving mechanical and thermal isolation of portions of integrated monolithic circuits
US5656547A (en) * 1994-05-11 1997-08-12 Chipscale, Inc. Method for making a leadless surface mounted device with wrap-around flange interface contacts
DE19580604T1 (de) * 1994-06-09 1997-05-07 Chipscale Inc Widerstandsfabrikation
US6083811A (en) * 1996-02-07 2000-07-04 Northrop Grumman Corporation Method for producing thin dice from fragile materials
US5915167A (en) * 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6551857B2 (en) 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US6748994B2 (en) * 2001-04-11 2004-06-15 Avery Dennison Corporation Label applicator, method and label therefor
US7402897B2 (en) * 2002-08-08 2008-07-22 Elm Technology Corporation Vertical system integration

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3092522A (en) * 1960-04-27 1963-06-04 Motorola Inc Method and apparatus for use in the manufacture of transistors
US3187403A (en) * 1962-04-24 1965-06-08 Burroughs Corp Method of making semiconductor circuit elements
US3332137A (en) * 1964-09-28 1967-07-25 Rca Corp Method of isolating chips of a wafer of semiconductor material

Also Published As

Publication number Publication date
DE1764200A1 (de) 1972-02-17
US3559282A (en) 1971-02-02
US3445925A (en) 1969-05-27
BE714119A (cg-RX-API-DMAC7.html) 1968-10-24
FR1570699A (cg-RX-API-DMAC7.html) 1969-06-13
NL6805665A (cg-RX-API-DMAC7.html) 1968-10-28

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees