GB1131740A - Semi-conductor devices - Google Patents

Semi-conductor devices

Info

Publication number
GB1131740A
GB1131740A GB39042/67A GB3904267A GB1131740A GB 1131740 A GB1131740 A GB 1131740A GB 39042/67 A GB39042/67 A GB 39042/67A GB 3904267 A GB3904267 A GB 3904267A GB 1131740 A GB1131740 A GB 1131740A
Authority
GB
United Kingdom
Prior art keywords
layer
pure
alloyed
thick
sprayed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB39042/67A
Inventor
Vitautus Balio Tolutis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INST FYSIKI I MAT
Original Assignee
INST FYSIKI I MAT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INST FYSIKI I MAT filed Critical INST FYSIKI I MAT
Priority to GB39042/67A priority Critical patent/GB1131740A/en
Publication of GB1131740A publication Critical patent/GB1131740A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
    • H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
    • H01L21/105—Treatment of the surface of the selenium or tellurium layer after having been made conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optical Record Carriers And Manufacture Thereof (AREA)

Abstract

1,131,740. Semi-conductor devices. INSTITUTE FYSIKI I MATEMATIKI. 24 Aug., 1967, No. 39044/67. Addition to 1,093,122. Heading H1K. The manufacture of a selenium memory cell comprises forming a layer of Se 2-3 Á thick alloyed with Ag, between a layer of pure Se and a layer which forms a rectifying contact with Se. The Se/Ag alloyed layer may alternatively be replaced by a 1-2 Á thick layer of silver selenide, or both this layer and the layer of pure Se may be replaced by a single layer of silver selenide 5-10 Á thick, in which case the cell is electroformed by reverse current. The cell is preferably formed on a monocrystalline substrate of Ge or Si on to which are sprayed electrode layers firstly of Al, through a mask, and then of Bi. A pure Se layer is then sprayed on and crystallized at 200‹ C. to form hexagonal Se having its c-axis along the substrate surface. The alloyed Se/Ag layer is sprayed on, after which the rectifying layer, e.g. of cadmium selenide or of Cd/Sn alloy covered with Sn, is applied.
GB39042/67A 1967-08-24 1967-08-24 Semi-conductor devices Expired GB1131740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB39042/67A GB1131740A (en) 1967-08-24 1967-08-24 Semi-conductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB39042/67A GB1131740A (en) 1967-08-24 1967-08-24 Semi-conductor devices

Publications (1)

Publication Number Publication Date
GB1131740A true GB1131740A (en) 1968-10-23

Family

ID=10407273

Family Applications (1)

Application Number Title Priority Date Filing Date
GB39042/67A Expired GB1131740A (en) 1967-08-24 1967-08-24 Semi-conductor devices

Country Status (1)

Country Link
GB (1) GB1131740A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003065456A2 (en) * 2002-01-31 2003-08-07 Micron Technology, Inc. Methods of forming non-volatile resistance variable devices and methods of forming silver selenide comprising structures

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003065456A2 (en) * 2002-01-31 2003-08-07 Micron Technology, Inc. Methods of forming non-volatile resistance variable devices and methods of forming silver selenide comprising structures
WO2003065456A3 (en) * 2002-01-31 2003-12-04 Micron Technology Inc Methods of forming non-volatile resistance variable devices and methods of forming silver selenide comprising structures
US6812087B2 (en) 2002-01-31 2004-11-02 Micron Technology, Inc. Methods of forming non-volatile resistance variable devices and methods of forming silver selenide comprising structures

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