FR3122284B1 - Circuit intégré comportant au moins un élément capacitif et procédé de fabrication correspondant. - Google Patents

Circuit intégré comportant au moins un élément capacitif et procédé de fabrication correspondant. Download PDF

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Publication number
FR3122284B1
FR3122284B1 FR2104162A FR2104162A FR3122284B1 FR 3122284 B1 FR3122284 B1 FR 3122284B1 FR 2104162 A FR2104162 A FR 2104162A FR 2104162 A FR2104162 A FR 2104162A FR 3122284 B1 FR3122284 B1 FR 3122284B1
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FR
France
Prior art keywords
conductive layer
integrated circuit
capacitive element
p2ext
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2104162A
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English (en)
Other versions
FR3122284A1 (fr
Inventor
Abderrezak Marzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR2104162A priority Critical patent/FR3122284B1/fr
Priority to US17/723,706 priority patent/US20220344327A1/en
Priority to CN202220927460.9U priority patent/CN218831251U/zh
Priority to CN202210420828.7A priority patent/CN115224195A/zh
Publication of FR3122284A1 publication Critical patent/FR3122284A1/fr
Application granted granted Critical
Publication of FR3122284B1 publication Critical patent/FR3122284B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Le circuit intégré comporte au moins un élément capacitif (CPP) comprenant : - une première couche conductrice (P1), délimitée par un contour (P1cntr) ;- une couche diélectrique basse tension (GO) recouvrant la première couche conductrice (P1) ; - une deuxième couche conductrice (P2) comportant : -- une première partie (P2int) située sur une zone centrale de la première couche conductrice (P1), -- une deuxième partie (P2ext) située sur la première couche conductrice (P1) en bordure intérieure de tout le contour de la première couche conductrice (brdr_int), et sur la face avant (FA) en bordure extérieure de tout le contour de la première couche conductrice (brdr_ext), la première partie (P2int) et la deuxième partie (P2ext) de la deuxième couche conductrice étant électriquement séparées, la première couche conductrice (P1) étant électriquement connectée à la deuxième partie de la deuxième couche conductrice (P2ext). Figure pour l’abrégé : Fig 2
FR2104162A 2021-04-21 2021-04-21 Circuit intégré comportant au moins un élément capacitif et procédé de fabrication correspondant. Active FR3122284B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR2104162A FR3122284B1 (fr) 2021-04-21 2021-04-21 Circuit intégré comportant au moins un élément capacitif et procédé de fabrication correspondant.
US17/723,706 US20220344327A1 (en) 2021-04-21 2022-04-19 Integrated circuit including at least one capacitive element and corresponding manufacturing method
CN202220927460.9U CN218831251U (zh) 2021-04-21 2022-04-20 包括电容元件的集成电路
CN202210420828.7A CN115224195A (zh) 2021-04-21 2022-04-20 包括至少一个电容元件的集成电路及对应的制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2104162A FR3122284B1 (fr) 2021-04-21 2021-04-21 Circuit intégré comportant au moins un élément capacitif et procédé de fabrication correspondant.
FR2104162 2021-04-21

Publications (2)

Publication Number Publication Date
FR3122284A1 FR3122284A1 (fr) 2022-10-28
FR3122284B1 true FR3122284B1 (fr) 2023-06-02

Family

ID=76375235

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2104162A Active FR3122284B1 (fr) 2021-04-21 2021-04-21 Circuit intégré comportant au moins un élément capacitif et procédé de fabrication correspondant.

Country Status (2)

Country Link
US (1) US20220344327A1 (fr)
FR (1) FR3122284B1 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004247520A (ja) * 2003-02-14 2004-09-02 Matsushita Electric Ind Co Ltd 半導体装置
JP2008252044A (ja) * 2007-03-30 2008-10-16 Sharp Corp Ｍｉｍ容量素子を備える半導体装置及びその製造方法
US20200411633A1 (en) * 2019-06-26 2020-12-31 Texas Instruments Incorporated Integrated circuits including composite dielectric layer

Also Published As

Publication number Publication date
FR3122284A1 (fr) 2022-10-28
US20220344327A1 (en) 2022-10-27

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