FR3079374B1 - Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant - Google Patents
Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant Download PDFInfo
- Publication number
- FR3079374B1 FR3079374B1 FR1852413A FR1852413A FR3079374B1 FR 3079374 B1 FR3079374 B1 FR 3079374B1 FR 1852413 A FR1852413 A FR 1852413A FR 1852413 A FR1852413 A FR 1852413A FR 3079374 B1 FR3079374 B1 FR 3079374B1
- Authority
- FR
- France
- Prior art keywords
- managing
- locked loop
- phase locked
- integrated circuit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title abstract 3
- 230000007704 transition Effects 0.000 abstract 2
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/105—Resetting the controlled oscillator when its frequency is outside a predetermined limit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
- H03L7/146—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by using digital means for generating the oscillator control signal
- H03L7/148—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by using digital means for generating the oscillator control signal said digital means comprising a counter or a divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Procédé de gestion du fonctionnement d'une boucle à verrouillage de phase (BV), la boucle comprenant un oscillateur contrôlé en tension (16) par un signal de contrôle (SC) et un comparateur de phase (14) recevant un signal de référence (CKIN) et un signal de retour (CKFB) issu du signal de sortie (SS) de l'oscillateur (16), le procédé comprenant une détection d'une absence éventuelle de transitions sur le signal de retour (CKFB) pendant une première durée et en réponse à une telle absence, un forçage de la décroissance (DWN) de la tension dudit signal de contrôle (SC) au moins jusqu'à une réapparition de transitions sur ledit signal de retour (CKFB).
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1852413A FR3079374B1 (fr) | 2018-03-21 | 2018-03-21 | Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant |
CN201920220792.1U CN209488555U (zh) | 2018-03-21 | 2019-02-21 | 集成电路 |
CN201910130391.1A CN110299913B (zh) | 2018-03-21 | 2019-02-21 | 用于管理锁相环的方法和相关电路 |
US16/289,225 US10530374B2 (en) | 2018-03-21 | 2019-02-28 | Method for managing a phase-locked loop and related circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1852413A FR3079374B1 (fr) | 2018-03-21 | 2018-03-21 | Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant |
FR1852413 | 2018-03-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3079374A1 FR3079374A1 (fr) | 2019-09-27 |
FR3079374B1 true FR3079374B1 (fr) | 2020-04-17 |
Family
ID=63014656
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1852413A Active FR3079374B1 (fr) | 2018-03-21 | 2018-03-21 | Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant |
Country Status (3)
Country | Link |
---|---|
US (1) | US10530374B2 (fr) |
CN (2) | CN209488555U (fr) |
FR (1) | FR3079374B1 (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3079374B1 (fr) * | 2018-03-21 | 2020-04-17 | Stmicroelectronics (Rousset) Sas | Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant |
CN113839666A (zh) * | 2020-06-24 | 2021-12-24 | 意法半导体(鲁塞)公司 | 用于管理锁相环的启动的处理和对应的集成电路 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0520558A1 (fr) * | 1991-06-27 | 1992-12-30 | Koninklijke Philips Electronics N.V. | Boucle à verrouillage de phase et comparateur numérique de phase destiné à être utilisé dans une boucle à verrouillage de phase |
US5949261A (en) * | 1996-12-17 | 1999-09-07 | Cypress Semiconductor Corp. | Method and circuit for reducing power and/or current consumption |
US7564283B1 (en) * | 1998-06-22 | 2009-07-21 | Xilinx, Inc. | Automatic tap delay calibration for precise digital phase shift |
JP2000065902A (ja) * | 1998-08-25 | 2000-03-03 | Mitsubishi Electric Corp | 半導体装置 |
US6744324B1 (en) * | 2001-03-19 | 2004-06-01 | Cisco Technology, Inc. | Frequency synthesizer using a VCO having a controllable operating point, and calibration and tuning thereof |
US6466058B1 (en) * | 2001-12-10 | 2002-10-15 | Texas Instruments Incorporated | PLL lock detection using a cycle slip detector with clock presence detection |
CN1332508C (zh) * | 2002-02-01 | 2007-08-15 | 皇家飞利浦电子股份有限公司 | 具有降低的时钟抖动的锁相环 |
US6570421B1 (en) * | 2002-08-29 | 2003-05-27 | Sun Microsystems, Inc. | Programmable leakage current offset for phase locked loop |
US7038508B2 (en) * | 2004-04-30 | 2006-05-02 | Intel Corporation | Methods and apparatuses for detecting clock loss in a phase-locked loop |
US7375593B2 (en) * | 2005-01-19 | 2008-05-20 | Paul William Ronald Self | Circuits and methods of generating and controlling signals on an integrated circuit |
US7368961B2 (en) * | 2005-12-22 | 2008-05-06 | Rambus Inc. | Clock distribution network supporting low-power mode |
KR100717103B1 (ko) * | 2006-03-04 | 2007-05-10 | 삼성전자주식회사 | 전압제어 발진기의 발진 주파수를 자동 튜닝할 수 있는위상동기루프 회로, 및 지연라인의 지연시간을 자동 튜닝할수 있는 지연동기루프 회로 |
JP5521282B2 (ja) * | 2008-05-01 | 2014-06-11 | 富士通株式会社 | 位相比較器、位相同期回路及び位相比較制御方法 |
US8018259B2 (en) * | 2010-01-28 | 2011-09-13 | Freescale Semiconductor, Inc. | Phase-locked loop having a feedback clock detector circuit and method therefor |
US8570108B2 (en) * | 2011-08-05 | 2013-10-29 | Qualcomm Incorporated | Injection-locking a slave oscillator to a master oscillator with no frequency overshoot |
US8638173B2 (en) * | 2011-11-15 | 2014-01-28 | Qualcomm Incorporated | System and method of calibrating a phase-locked loop while maintaining lock |
CN102868399B (zh) * | 2012-10-11 | 2015-01-21 | 广州润芯信息技术有限公司 | 锁相环频率综合器和锁相环失锁检测及调节方法 |
US9100027B2 (en) * | 2013-03-12 | 2015-08-04 | Uniquify, Inc. | Data interface circuit for capturing received data bits including continuous calibration |
US9240795B2 (en) * | 2014-01-31 | 2016-01-19 | Silicon Laboratories, Inc. | Apparatus and methods for phase-locked loop oscillator calibration and lock detection |
FR3079374B1 (fr) * | 2018-03-21 | 2020-04-17 | Stmicroelectronics (Rousset) Sas | Procede de gestion du fonctionnement d'une boucle a verrouillage de phase, et circuit integre correspondant |
-
2018
- 2018-03-21 FR FR1852413A patent/FR3079374B1/fr active Active
-
2019
- 2019-02-21 CN CN201920220792.1U patent/CN209488555U/zh not_active Withdrawn - After Issue
- 2019-02-21 CN CN201910130391.1A patent/CN110299913B/zh active Active
- 2019-02-28 US US16/289,225 patent/US10530374B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN110299913B (zh) | 2024-08-13 |
US10530374B2 (en) | 2020-01-07 |
CN110299913A (zh) | 2019-10-01 |
CN209488555U (zh) | 2019-10-11 |
US20190296753A1 (en) | 2019-09-26 |
FR3079374A1 (fr) | 2019-09-27 |
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