FR3059116B1 - Dispositif d'interface pour unite de traitement permettant de connecter une pluralite de circuits et d'acquerir leur valeur d'etat au moyen d'un unique port d'entree - Google Patents
Dispositif d'interface pour unite de traitement permettant de connecter une pluralite de circuits et d'acquerir leur valeur d'etat au moyen d'un unique port d'entree Download PDFInfo
- Publication number
- FR3059116B1 FR3059116B1 FR1661428A FR1661428A FR3059116B1 FR 3059116 B1 FR3059116 B1 FR 3059116B1 FR 1661428 A FR1661428 A FR 1661428A FR 1661428 A FR1661428 A FR 1661428A FR 3059116 B1 FR3059116 B1 FR 3059116B1
- Authority
- FR
- France
- Prior art keywords
- circuits
- processing unit
- circuit
- switch2
- switch1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
- G06F3/038—Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
- G06F1/189—Power distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017581—Coupling arrangements; Interface arrangements programmable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Human Computer Interaction (AREA)
- Electronic Switches (AREA)
- Power Sources (AREA)
- Logic Circuits (AREA)
Abstract
Dispositif d'interface (1) pour une unité de traitement (µC), permettant de connecter une pluralité de circuits (Switch1-Switch2) à un unique port d'entrée (Input1) de l'unité de traitement (µC), apte à acquérir une valeur d'état d'un circuit (Switch1-Switch2) de la pluralité de circuits, lorsque ledit circuit (Switch1-Switch2) est polarisé, comprenant une pluralité, de même cardinal, de sources d'alimentation (Vdd1-Vdd2), chaque source d'alimentation (Vdd1-Vdd2) étant associée à un circuit (Switch1-Switch2) de la pluralité de circuits et apte à le polariser, un moyen de commutation (PushVdd1, PullVdd1, PushVdd2, PullVdd2) apte à sélectivement connecter un unique circuit (Switch1-Switch2) de la pluralité de circuits à la source d'alimentation (Vdd1-Vdd2) associée, de telle manière à polariser le circuit, et à connecter tous les autres circuits à la masse, la sélection du circuit polarisé étant commandée par un jeu d'au moins un port de sortie (Output1-Output2) de l'unité de traitement (µC).
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1661428A FR3059116B1 (fr) | 2016-11-24 | 2016-11-24 | Dispositif d'interface pour unite de traitement permettant de connecter une pluralite de circuits et d'acquerir leur valeur d'etat au moyen d'un unique port d'entree |
CN201780072608.7A CN109983702B (zh) | 2016-11-24 | 2017-11-23 | 使得能够连接多个电路并通过单个输入端口采集其状态值的用于处理单元的接口设备 |
PCT/FR2017/053227 WO2018096279A1 (fr) | 2016-11-24 | 2017-11-23 | Dispositif d'interface pour unité de traitement permettant de connecter une pluralité de circuits et d'acquérir leur valeur d'état au moyen d'un unique port d'entrée |
US16/339,441 US11385699B2 (en) | 2016-11-24 | 2017-11-23 | Interface device for a processing unit for connecting a plurality of circuits and acquiring their state value by means of a single input port |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1661428 | 2016-11-24 | ||
FR1661428A FR3059116B1 (fr) | 2016-11-24 | 2016-11-24 | Dispositif d'interface pour unite de traitement permettant de connecter une pluralite de circuits et d'acquerir leur valeur d'etat au moyen d'un unique port d'entree |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3059116A1 FR3059116A1 (fr) | 2018-05-25 |
FR3059116B1 true FR3059116B1 (fr) | 2019-02-01 |
Family
ID=58501475
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1661428A Active FR3059116B1 (fr) | 2016-11-24 | 2016-11-24 | Dispositif d'interface pour unite de traitement permettant de connecter une pluralite de circuits et d'acquerir leur valeur d'etat au moyen d'un unique port d'entree |
Country Status (4)
Country | Link |
---|---|
US (1) | US11385699B2 (fr) |
CN (1) | CN109983702B (fr) |
FR (1) | FR3059116B1 (fr) |
WO (1) | WO2018096279A1 (fr) |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4547056A (en) * | 1984-11-15 | 1985-10-15 | Eastman Kodak Company | Digital circuit with improved input/output connections |
US4634843A (en) * | 1986-01-16 | 1987-01-06 | General Electric Company | Dual mode power control arrangement for cooking appliance |
CN1109404C (zh) * | 1993-09-20 | 2003-05-21 | 株式会社鹰山 | 计算电路 |
JP2001155574A (ja) * | 1999-11-24 | 2001-06-08 | Alps Electric Co Ltd | スイッチ入力処理モジュール |
US6624661B2 (en) * | 2001-08-16 | 2003-09-23 | Via Technologies, Inc. | Programmable drive circuit for I/O port |
JP4026418B2 (ja) * | 2002-06-05 | 2007-12-26 | 株式会社デンソー | スイッチ状態検出装置 |
US7276932B2 (en) * | 2004-08-26 | 2007-10-02 | International Business Machines Corporation | Power-gating cell for virtual power rail control |
EP1834277B1 (fr) * | 2005-01-07 | 2010-05-26 | Thomson Licensing SAS | Procede de communication par un detecteur de presence de cartes a puces dans un lecteur, cartes a puces et appareil lecteur communiquant par le detecteur de presence |
JP4811192B2 (ja) * | 2006-08-24 | 2011-11-09 | ソニー株式会社 | 駆動回路 |
EP2761851A2 (fr) * | 2011-09-29 | 2014-08-06 | Delta Electronics (Thailand) Public Co., Ltd. | Protocole automatique (pa) pour système de chargeur usb |
WO2014065389A1 (fr) * | 2012-10-25 | 2014-05-01 | Semiconductor Energy Laboratory Co., Ltd. | Système de commande centrale |
CN105379110B (zh) * | 2013-08-08 | 2018-01-05 | 株式会社索思未来 | 并联谐振电路 |
US8786130B1 (en) * | 2013-08-23 | 2014-07-22 | Inoso, Llc | Method of forming an electromechanical power switch for controlling power to integrated circuit devices and related devices |
CN103716034B (zh) * | 2013-12-31 | 2016-08-17 | 上海贝岭股份有限公司 | 一种芯片引脚复用电路 |
TWI545915B (zh) * | 2014-03-31 | 2016-08-11 | 鴻海精密工業股份有限公司 | 乙太網供電設備 |
US11625675B2 (en) * | 2014-10-02 | 2023-04-11 | Luxer Corporation | Method and system for controlling a storage room |
JP7436394B2 (ja) * | 2018-09-17 | 2024-02-21 | キャリア コーポレイション | コントローラ内部回路の自己検証 |
-
2016
- 2016-11-24 FR FR1661428A patent/FR3059116B1/fr active Active
-
2017
- 2017-11-23 WO PCT/FR2017/053227 patent/WO2018096279A1/fr active Application Filing
- 2017-11-23 CN CN201780072608.7A patent/CN109983702B/zh active Active
- 2017-11-23 US US16/339,441 patent/US11385699B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11385699B2 (en) | 2022-07-12 |
FR3059116A1 (fr) | 2018-05-25 |
US20200042067A1 (en) | 2020-02-06 |
CN109983702B (zh) | 2023-06-20 |
WO2018096279A1 (fr) | 2018-05-31 |
CN109983702A (zh) | 2019-07-05 |
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