FR3034252B1 - Procede de reduction de la contamination metallique sur la surface d'un substrat - Google Patents

Procede de reduction de la contamination metallique sur la surface d'un substrat Download PDF

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Publication number
FR3034252B1
FR3034252B1 FR1552416A FR1552416A FR3034252B1 FR 3034252 B1 FR3034252 B1 FR 3034252B1 FR 1552416 A FR1552416 A FR 1552416A FR 1552416 A FR1552416 A FR 1552416A FR 3034252 B1 FR3034252 B1 FR 3034252B1
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France
Prior art keywords
substrate
metallic contamination
reducing metallic
reducing
contamination
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Active
Application number
FR1552416A
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English (en)
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FR3034252A1 (fr
Inventor
Thierry Barge
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Soitec SA
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Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1552416A priority Critical patent/FR3034252B1/fr
Priority to AU2016201774A priority patent/AU2016201774B2/en
Priority to US15/078,902 priority patent/US9812371B2/en
Priority to JP2016058779A priority patent/JP2016181699A/ja
Priority to KR1020160035557A priority patent/KR102507136B1/ko
Publication of FR3034252A1 publication Critical patent/FR3034252A1/fr
Application granted granted Critical
Publication of FR3034252B1 publication Critical patent/FR3034252B1/fr
Priority to JP2021013447A priority patent/JP7160469B2/ja
Active legal-status Critical Current
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2011—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline insulating material, e.g. sapphire
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Cleaning In General (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
FR1552416A 2015-03-24 2015-03-24 Procede de reduction de la contamination metallique sur la surface d'un substrat Active FR3034252B1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FR1552416A FR3034252B1 (fr) 2015-03-24 2015-03-24 Procede de reduction de la contamination metallique sur la surface d'un substrat
AU2016201774A AU2016201774B2 (en) 2015-03-24 2016-03-21 Method for reducing the metal contamination on a surface of a substrate
US15/078,902 US9812371B2 (en) 2015-03-24 2016-03-23 Methods for reducing metal contamination on a surface of a sapphire substrate by plasma treatment
JP2016058779A JP2016181699A (ja) 2015-03-24 2016-03-23 基板の表面の金属汚染物を減少させるための方法
KR1020160035557A KR102507136B1 (ko) 2015-03-24 2016-03-24 기판 표면 상의 금속 오염을 감소시키는 방법
JP2021013447A JP7160469B2 (ja) 2015-03-24 2021-01-29 基板の表面の金属汚染物を減少させるための方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1552416A FR3034252B1 (fr) 2015-03-24 2015-03-24 Procede de reduction de la contamination metallique sur la surface d'un substrat
FR1552416 2015-03-24

Publications (2)

Publication Number Publication Date
FR3034252A1 FR3034252A1 (fr) 2016-09-30
FR3034252B1 true FR3034252B1 (fr) 2018-01-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
FR1552416A Active FR3034252B1 (fr) 2015-03-24 2015-03-24 Procede de reduction de la contamination metallique sur la surface d'un substrat

Country Status (5)

Country Link
US (1) US9812371B2 (fr)
JP (2) JP2016181699A (fr)
KR (1) KR102507136B1 (fr)
AU (1) AU2016201774B2 (fr)
FR (1) FR3034252B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10283452B2 (en) * 2017-09-15 2019-05-07 Yangtze Memory Technology Co., Ltd. Three-dimensional memory devices having a plurality of NAND strings

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6399521A (ja) * 1985-12-12 1988-04-30 Agency Of Ind Science & Technol 半導体薄膜の製造方法
KR19980050972A (ko) * 1996-12-21 1998-09-15 양승택 리모트 수소 플라즈마를 이용한 금속오염 제거 방법
EP1086260A1 (fr) * 1998-05-12 2001-03-28 Applied Materials, Inc. Melange de gaz argon-oxygene permettant un pre-nettoyage dans un systeme de traitement sous vide
KR100275534B1 (ko) * 1998-07-31 2000-12-15 정선종 실리콘 기판 표면위의 금속 오염물 제거방법
KR100573929B1 (ko) * 2001-12-14 2006-04-26 (주)에이피엘 플라즈마를 이용한 표면 세정 장치 및 방법
FR2938702B1 (fr) * 2008-11-19 2011-03-04 Soitec Silicon On Insulator Preparation de surface d'un substrat saphir pour la realisation d'heterostructures
JP2010278337A (ja) 2009-05-29 2010-12-09 Shin-Etsu Chemical Co Ltd 表面欠陥密度が少ないｓｏｓ基板
JP2010278341A (ja) 2009-05-29 2010-12-09 Shin-Etsu Chemical Co Ltd 貼り合わせｓｏｓ基板
JP2012004272A (ja) * 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd 炭化珪素半導体の洗浄方法および炭化珪素半導体の洗浄装置
CN101912855B (zh) 2010-07-21 2012-09-05 河北工业大学 蓝宝石衬底材料抛光后表面洁净方法
JP5613580B2 (ja) * 2011-02-09 2014-10-22 三菱電機株式会社 基板の製造方法
CN102218410A (zh) 2011-04-19 2011-10-19 浙江露笑光电有限公司 蓝宝石抛光后的清洗方法
EP2879176B1 (fr) * 2012-07-25 2019-12-04 Shin-Etsu Chemical Co., Ltd. Procédé de production de substrats hybrides et substrat hybride
WO2014017368A1 (fr) 2012-07-25 2014-01-30 信越化学工業株式会社 Procédé de production de substrats sos et substrat sos
EP2993686B1 (fr) 2013-05-01 2021-05-26 Shin-Etsu Chemical Co., Ltd. Procédé de production de substrat hybride
CN103537453B (zh) 2013-08-20 2015-06-10 曾锡强 一种蓝宝石衬底晶片抛光后的超声清洗方法

Also Published As

Publication number Publication date
JP7160469B2 (ja) 2022-10-25
US9812371B2 (en) 2017-11-07
AU2016201774B2 (en) 2021-02-25
FR3034252A1 (fr) 2016-09-30
JP2016181699A (ja) 2016-10-13
KR102507136B1 (ko) 2023-03-07
AU2016201774A1 (en) 2016-10-13
US20160284608A1 (en) 2016-09-29
KR20160114544A (ko) 2016-10-05
JP2021082828A (ja) 2021-05-27

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