SG10201906893VA - Package substrate processing method - Google Patents

Package substrate processing method

Info

Publication number
SG10201906893VA
SG10201906893VA SG10201906893VA SG10201906893VA SG10201906893VA SG 10201906893V A SG10201906893V A SG 10201906893VA SG 10201906893V A SG10201906893V A SG 10201906893VA SG 10201906893V A SG10201906893V A SG 10201906893VA SG 10201906893V A SG10201906893V A SG 10201906893VA
Authority
SG
Singapore
Prior art keywords
processing method
substrate processing
package substrate
package
substrate
Prior art date
Application number
SG10201906893VA
Inventor
Kenji Takenouchi
Mitsutane Kokubu
Naoko Yamamoto
Chisato Yamada
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG10201906893VA publication Critical patent/SG10201906893VA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67023—Apparatus for fluid treatment for general liquid treatment, e.g. etching followed by cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Grinding-Machine Dressing And Accessory Apparatuses (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Control And Other Processes For Unpacking Of Materials (AREA)
SG10201906893VA 2018-08-17 2019-07-25 Package substrate processing method SG10201906893VA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2018153474A JP7340911B2 (en) 2018-08-17 2018-08-17 Package substrate processing method

Publications (1)

Publication Number Publication Date
SG10201906893VA true SG10201906893VA (en) 2020-03-30

Family

ID=69523364

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201906893VA SG10201906893VA (en) 2018-08-17 2019-07-25 Package substrate processing method

Country Status (8)

Country Link
US (1) US11101151B2 (en)
JP (1) JP7340911B2 (en)
KR (1) KR20200020586A (en)
CN (1) CN110838450B (en)
DE (1) DE102019212183A1 (en)
MY (1) MY192105A (en)
SG (1) SG10201906893VA (en)
TW (1) TWI803681B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113257713B (en) * 2021-05-11 2024-05-17 日月新半导体(苏州)有限公司 Integrated circuit deburring device, integrated circuit deburring auxiliary device and integrated circuit deburring method
CN114571340B (en) * 2022-05-09 2022-09-16 杭州荆鑫机械有限公司 Polishing device and polishing method for mechanical finish machining

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008130929A (en) 2006-11-22 2008-06-05 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method of same
JP2015138950A (en) 2014-01-24 2015-07-30 株式会社ディスコ Cutting device
JP6274926B2 (en) * 2014-03-17 2018-02-07 株式会社ディスコ Cutting method
JP6426407B2 (en) * 2014-09-03 2018-11-21 株式会社ディスコ Wafer processing method
JP6486710B2 (en) 2015-02-23 2019-03-20 株式会社ディスコ Cutting equipment
JP6588215B2 (en) 2015-03-24 2019-10-09 株式会社ディスコ Package substrate cutting method
JP6707396B2 (en) * 2016-05-11 2020-06-10 株式会社ディスコ Cutting equipment
JP6791581B2 (en) * 2016-11-11 2020-11-25 株式会社ディスコ Jig table for cutting package substrate

Also Published As

Publication number Publication date
US20200058525A1 (en) 2020-02-20
DE102019212183A1 (en) 2020-03-05
US11101151B2 (en) 2021-08-24
TWI803681B (en) 2023-06-01
TW202009998A (en) 2020-03-01
CN110838450A (en) 2020-02-25
MY192105A (en) 2022-07-27
JP2020027917A (en) 2020-02-20
KR20200020586A (en) 2020-02-26
CN110838450B (en) 2024-05-24
JP7340911B2 (en) 2023-09-08

Similar Documents

Publication Publication Date Title
SG10201700218WA (en) Packaged wafer processing method
SG10201905294RA (en) Wafer processing method
SG10201904699RA (en) Wafer processing method
SG10201700215TA (en) Package wafer processing method
SG10201907085QA (en) Semiconductor substrate processing method
SG10201905935VA (en) Wafer processing method
SG10202006736YA (en) Wafer processing method
SG10202000576QA (en) Wafer processing method
SG10202004876YA (en) Wafer processing method
SG10201911116YA (en) Wafer processing method
SG10201912832SA (en) Wafer processing method
SG10201909522RA (en) Wafer processing method
SG10201906678TA (en) Wafer processing method
SG10201905936RA (en) Wafer processing method
SG10201904719TA (en) Wafer processing method
SG10201906893VA (en) Package substrate processing method
SG10202009952SA (en) Wafer processing method
SG10202003482RA (en) Wafer processing method
SG10202002647RA (en) Wafer processing method
SG10201910165QA (en) Wafer processing method
SG10202000574XA (en) Wafer processing method
SG10201910032WA (en) Wafer processing method
SG10201906896QA (en) Wafer processing method
SG10201906897SA (en) Wafer processing method
SG10201904710UA (en) Wafer processing method