FR2987935B1 - Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi). - Google Patents

Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi).

Info

Publication number
FR2987935B1
FR2987935B1 FR1252203A FR1252203A FR2987935B1 FR 2987935 B1 FR2987935 B1 FR 2987935B1 FR 1252203 A FR1252203 A FR 1252203A FR 1252203 A FR1252203 A FR 1252203A FR 2987935 B1 FR2987935 B1 FR 2987935B1
Authority
FR
France
Prior art keywords
silicon
slurning
soi
insulation
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1252203A
Other languages
English (en)
Other versions
FR2987935A1 (fr
Inventor
Francois Boedt
Sebastien Kerdiles
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR1252203A priority Critical patent/FR2987935B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to KR20147025599A priority patent/KR20140135980A/ko
Priority to CN201380013727.7A priority patent/CN104160475B/zh
Priority to SG11201405349WA priority patent/SG11201405349WA/en
Priority to PCT/IB2013/000147 priority patent/WO2013136146A1/fr
Priority to US14/382,738 priority patent/US9082819B2/en
Priority to DE112013001393.2T priority patent/DE112013001393T5/de
Publication of FR2987935A1 publication Critical patent/FR2987935A1/fr
Application granted granted Critical
Publication of FR2987935B1 publication Critical patent/FR2987935B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
FR1252203A 2012-03-12 2012-03-12 Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi). Expired - Fee Related FR2987935B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1252203A FR2987935B1 (fr) 2012-03-12 2012-03-12 Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi).
CN201380013727.7A CN104160475B (zh) 2012-03-12 2013-01-30 “绝缘体上硅”(soi)型衬底的活性硅层的薄化方法
SG11201405349WA SG11201405349WA (en) 2012-03-12 2013-01-30 Process for thinning the active silicon layer of a substrate of "silicon on insulator" (soi) type
PCT/IB2013/000147 WO2013136146A1 (fr) 2012-03-12 2013-01-30 Procédé d'amincissement de la couche active de silicium d'un substrat de type silicium sur isolant
KR20147025599A KR20140135980A (ko) 2012-03-12 2013-01-30 실리콘 온 인슐레이터(soi) 타입 기판의 활성 실리콘층 박막화 공정
US14/382,738 US9082819B2 (en) 2012-03-12 2013-01-30 Process for thinning the active silicon layer of a substrate of “silicon on insulator” (SOI) type
DE112013001393.2T DE112013001393T5 (de) 2012-03-12 2013-01-30 Verfahren zum Dünnen der aktiven Siliziumschicht eines Substrats vom Typ "Silizium-auf-lsolator" (SOI))

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1252203A FR2987935B1 (fr) 2012-03-12 2012-03-12 Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi).

Publications (2)

Publication Number Publication Date
FR2987935A1 FR2987935A1 (fr) 2013-09-13
FR2987935B1 true FR2987935B1 (fr) 2016-07-22

Family

ID=47747710

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1252203A Expired - Fee Related FR2987935B1 (fr) 2012-03-12 2012-03-12 Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi).

Country Status (7)

Country Link
US (1) US9082819B2 (fr)
KR (1) KR20140135980A (fr)
CN (1) CN104160475B (fr)
DE (1) DE112013001393T5 (fr)
FR (1) FR2987935B1 (fr)
SG (1) SG11201405349WA (fr)
WO (1) WO2013136146A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3234987B1 (fr) 2014-12-19 2020-09-23 GlobalWafers Co., Ltd. Systèmes et procédés destinés à effectuer des processus de lissage épitaxial sur des structures semi-conductrices
US10304723B1 (en) * 2017-11-22 2019-05-28 Taiwan Semiconductor Manufacturing Co., Ltd. Process to form SOI substrate
US10395974B1 (en) * 2018-04-25 2019-08-27 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a thin semiconductor-on-insulator (SOI) substrate
FR3132380A1 (fr) * 2022-01-31 2023-08-04 Soitec Procédé de fabrication d’une structure de type double semi-conducteur sur isolant

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916744B2 (en) * 2002-12-19 2005-07-12 Applied Materials, Inc. Method and apparatus for planarization of a material by growing a sacrificial film with customized thickness profile
JP4285244B2 (ja) * 2004-01-08 2009-06-24 株式会社Ｓｕｍｃｏ Ｓｏｉウェーハの作製方法
US20080070340A1 (en) * 2006-09-14 2008-03-20 Nicholas Francis Borrelli Image sensor using thin-film SOI
FR2912259B1 (fr) * 2007-02-01 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat du type "silicium sur isolant".
CN102986020A (zh) * 2010-06-30 2013-03-20 康宁股份有限公司 对绝缘体基材上的硅进行精整的方法

Also Published As

Publication number Publication date
WO2013136146A1 (fr) 2013-09-19
US20150031190A1 (en) 2015-01-29
US9082819B2 (en) 2015-07-14
DE112013001393T5 (de) 2014-11-20
CN104160475A (zh) 2014-11-19
KR20140135980A (ko) 2014-11-27
FR2987935A1 (fr) 2013-09-13
CN104160475B (zh) 2016-12-07
SG11201405349WA (en) 2014-09-26

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