SG11201405349WA - Process for thinning the active silicon layer of a substrate of "silicon on insulator" (soi) type - Google Patents

Process for thinning the active silicon layer of a substrate of "silicon on insulator" (soi) type

Info

Publication number
SG11201405349WA
SG11201405349WA SG11201405349WA SG11201405349WA SG11201405349WA SG 11201405349W A SG11201405349W A SG 11201405349WA SG 11201405349W A SG11201405349W A SG 11201405349WA SG 11201405349W A SG11201405349W A SG 11201405349WA SG 11201405349W A SG11201405349W A SG 11201405349WA
Authority
SG
Singapore
Prior art keywords
soi
thinning
insulator
silicon
substrate
Prior art date
Application number
SG11201405349WA
Other languages
English (en)
Inventor
François Boedt
Sébastien Kerdiles
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG11201405349WA publication Critical patent/SG11201405349WA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
SG11201405349WA 2012-03-12 2013-01-30 Process for thinning the active silicon layer of a substrate of "silicon on insulator" (soi) type SG11201405349WA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1252203A FR2987935B1 (fr) 2012-03-12 2012-03-12 Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi).
PCT/IB2013/000147 WO2013136146A1 (fr) 2012-03-12 2013-01-30 Procédé d'amincissement de la couche active de silicium d'un substrat de type silicium sur isolant

Publications (1)

Publication Number Publication Date
SG11201405349WA true SG11201405349WA (en) 2014-09-26

Family

ID=47747710

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201405349WA SG11201405349WA (en) 2012-03-12 2013-01-30 Process for thinning the active silicon layer of a substrate of "silicon on insulator" (soi) type

Country Status (7)

Country Link
US (1) US9082819B2 (fr)
KR (1) KR20140135980A (fr)
CN (1) CN104160475B (fr)
DE (1) DE112013001393T5 (fr)
FR (1) FR2987935B1 (fr)
SG (1) SG11201405349WA (fr)
WO (1) WO2013136146A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10332781B2 (en) * 2014-12-19 2019-06-25 Globalwafers Co., Ltd. Systems and methods for performing epitaxial smoothing processes on semiconductor structures
US10304723B1 (en) * 2017-11-22 2019-05-28 Taiwan Semiconductor Manufacturing Co., Ltd. Process to form SOI substrate
US10395974B1 (en) * 2018-04-25 2019-08-27 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a thin semiconductor-on-insulator (SOI) substrate
FR3132380A1 (fr) * 2022-01-31 2023-08-04 Soitec Procédé de fabrication d’une structure de type double semi-conducteur sur isolant

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916744B2 (en) * 2002-12-19 2005-07-12 Applied Materials, Inc. Method and apparatus for planarization of a material by growing a sacrificial film with customized thickness profile
JP4285244B2 (ja) * 2004-01-08 2009-06-24 株式会社Ｓｕｍｃｏ Ｓｏｉウェーハの作製方法
US20080070340A1 (en) * 2006-09-14 2008-03-20 Nicholas Francis Borrelli Image sensor using thin-film SOI
FR2912259B1 (fr) * 2007-02-01 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat du type "silicium sur isolant".
EP2589069A2 (fr) * 2010-06-30 2013-05-08 Corning Incorporated Procédé de finition de silicium sur des substrats isolants

Also Published As

Publication number Publication date
WO2013136146A1 (fr) 2013-09-19
FR2987935B1 (fr) 2016-07-22
KR20140135980A (ko) 2014-11-27
US9082819B2 (en) 2015-07-14
FR2987935A1 (fr) 2013-09-13
DE112013001393T5 (de) 2014-11-20
CN104160475A (zh) 2014-11-19
CN104160475B (zh) 2016-12-07
US20150031190A1 (en) 2015-01-29

Similar Documents

Publication Publication Date Title
EP2795675A4 (fr) Intégration hybride de dispositifs semi-conducteurs des groupes iii-v sur du silicium
EP2839341A4 (fr) Couche de masque dur de silicium pour autoassemblage dirigé
EP2901486A4 (fr) Dispositifs semi-conducteurs gaa étirés formés sur des substrats isolés globalement ou localement
EP2715780A4 (fr) Plaquette de verre non polie, système d'amincissement et procédé pour utiliser celle-ci afin d'amincir un semi-conducteur étagé
TWI563583B (en) Electrostatic chuck and semiconductor/liquid crystal manufacturing equipment
EP3062337A4 (fr) Composition liquide de polissage pour tranches de silicium
SG166749A1 (en) Integrated circuit system with through silicon via and method of manufacture thereof
EP2579315A4 (fr) Transistor à couches minces, structure de contact, substrat, dispositif d'affichage et leurs procédés de production
EP2748841A4 (fr) Formulation pour une gravure chimique humide à l'acide des tranches de silicium
SG10201704400YA (en) Doping media for the local doping of silicon wafers
EP2875520A4 (fr) Procédé de gravure, procédé de production d'un substrat semi-conducteur et d'un dispositif à semi-conducteur l'utilisant, et kit de préparation d'un liquide de gravure
EP2767524A4 (fr) Substrat de nitrure de silicium et procédé de fabrication d'un substrat de nitrure de silicium
GB2510468B (en) Substrates for semiconductor devices
WO2012138903A3 (fr) Couches actives doubles pour dispositifs à semi-conducteur et ses procédés de fabrication
EP2629322B8 (fr) Fabrication de dispositif de puissance sur la face en retrait d'une plaquette amincie
GB201011118D0 (en) Transparent electrodes for semiconductor thin film devices
EP2573801A4 (fr) Solution de gravure et procédé destiné à traiter la surface d'un substrat de silicium
GB2502480B (en) Independently voltage controlled volume of silicon on a silicon on insulator chip
TWI560256B (en) Surface protecting adhesive film for semiconductor wafer and method manufacturing the same
SG11201504934UA (en) Liquid doping media for the local doping of silicon wafers
HK1180455A1 (zh) 具有額外有源區域的半導體裝置之間的隔離區域
EP2925089B8 (fr) Substrat pour dispositifs flexibles et méthode de production de celui-ci
EP2802001A4 (fr) Procédé de fabrication de tranche de silicium sur isolant (soi) fixée
GB2502215B (en) Structure and method for hard mask removal on an soi substrate without using CMP process
TWI563556B (en) Apparatus of etching glass substrate