FR2824176B1 - Procede et dispositif de lecture de cellules de memoire dynamique - Google Patents
Procede et dispositif de lecture de cellules de memoire dynamiqueInfo
- Publication number
- FR2824176B1 FR2824176B1 FR0105814A FR0105814A FR2824176B1 FR 2824176 B1 FR2824176 B1 FR 2824176B1 FR 0105814 A FR0105814 A FR 0105814A FR 0105814 A FR0105814 A FR 0105814A FR 2824176 B1 FR2824176 B1 FR 2824176B1
- Authority
- FR
- France
- Prior art keywords
- memory cells
- dynamic memory
- reading dynamic
- reading
- cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/14—Dummy cell management; Sense reference voltage generators
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0105814A FR2824176B1 (fr) | 2001-04-30 | 2001-04-30 | Procede et dispositif de lecture de cellules de memoire dynamique |
US10/135,981 US6515930B2 (en) | 2001-04-30 | 2002-04-29 | Dram cell reading method and device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0105814A FR2824176B1 (fr) | 2001-04-30 | 2001-04-30 | Procede et dispositif de lecture de cellules de memoire dynamique |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2824176A1 FR2824176A1 (fr) | 2002-10-31 |
FR2824176B1 true FR2824176B1 (fr) | 2003-10-31 |
Family
ID=8862857
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0105814A Expired - Lifetime FR2824176B1 (fr) | 2001-04-30 | 2001-04-30 | Procede et dispositif de lecture de cellules de memoire dynamique |
Country Status (2)
Country | Link |
---|---|
US (1) | US6515930B2 (fr) |
FR (1) | FR2824176B1 (fr) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2819091B1 (fr) * | 2000-12-29 | 2003-04-11 | St Microelectronics Sa | Rafraichissement de memoire dram |
FR2820539B1 (fr) * | 2001-02-02 | 2003-05-30 | St Microelectronics Sa | Procede et dispositif de rafraichissement de cellules de reference |
FR2826772B1 (fr) * | 2001-06-27 | 2005-03-04 | St Microelectronics Sa | Procede et circuit de rafaichissement de cellules de memoire dynamique |
US6738301B2 (en) * | 2002-08-29 | 2004-05-18 | Micron Technology, Inc. | Method and system for accelerating coupling of digital signals |
DE10343172B4 (de) * | 2003-09-18 | 2016-02-11 | Robert Bosch Gmbh | Datenübertragungsstrecke mit Einrichtung zur Prüfung der Datenintegrität |
US7551508B2 (en) * | 2007-11-16 | 2009-06-23 | International Business Machines Corporation | Energy efficient storage device using per-element selectable power supply voltages |
US10255968B2 (en) * | 2017-07-24 | 2019-04-09 | Omnivision Technologies, Inc. | DRAM core architecture with wide I/Os |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3678473A (en) * | 1970-06-04 | 1972-07-18 | Shell Oil Co | Read-write circuit for capacitive memory arrays |
JP4036487B2 (ja) * | 1995-08-18 | 2008-01-23 | 株式会社ルネサステクノロジ | 半導体記憶装置、および半導体回路装置 |
FR2773634B1 (fr) * | 1998-01-15 | 2004-01-02 | Sgs Thomson Microelectronics | Amelioration des memoires a rafraichissement |
FR2775382B1 (fr) * | 1998-02-25 | 2001-10-05 | St Microelectronics Sa | Procede de controle du rafraichissement d'un plan memoire d'un dispositif de memoire vive dynamique, et dispositif de memoire vive correspondant |
JP3797810B2 (ja) * | 1998-11-30 | 2006-07-19 | 松下電器産業株式会社 | 半導体装置 |
-
2001
- 2001-04-30 FR FR0105814A patent/FR2824176B1/fr not_active Expired - Lifetime
-
2002
- 2002-04-29 US US10/135,981 patent/US6515930B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6515930B2 (en) | 2003-02-04 |
FR2824176A1 (fr) | 2002-10-31 |
US20020159321A1 (en) | 2002-10-31 |
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