FR2773634B1 - Amelioration des memoires a rafraichissement - Google Patents

Amelioration des memoires a rafraichissement

Info

Publication number
FR2773634B1
FR2773634B1 FR9800567A FR9800567A FR2773634B1 FR 2773634 B1 FR2773634 B1 FR 2773634B1 FR 9800567 A FR9800567 A FR 9800567A FR 9800567 A FR9800567 A FR 9800567A FR 2773634 B1 FR2773634 B1 FR 2773634B1
Authority
FR
France
Prior art keywords
memories
improved cooling
cooling
improved
cooling memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9800567A
Other languages
English (en)
Other versions
FR2773634A1 (fr
Inventor
Richard Ferrant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9800567A priority Critical patent/FR2773634B1/fr
Publication of FR2773634A1 publication Critical patent/FR2773634A1/fr
Application granted granted Critical
Publication of FR2773634B1 publication Critical patent/FR2773634B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
FR9800567A 1998-01-15 1998-01-15 Amelioration des memoires a rafraichissement Expired - Fee Related FR2773634B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9800567A FR2773634B1 (fr) 1998-01-15 1998-01-15 Amelioration des memoires a rafraichissement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9800567A FR2773634B1 (fr) 1998-01-15 1998-01-15 Amelioration des memoires a rafraichissement

Publications (2)

Publication Number Publication Date
FR2773634A1 FR2773634A1 (fr) 1999-07-16
FR2773634B1 true FR2773634B1 (fr) 2004-01-02

Family

ID=9521954

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9800567A Expired - Fee Related FR2773634B1 (fr) 1998-01-15 1998-01-15 Amelioration des memoires a rafraichissement

Country Status (1)

Country Link
FR (1) FR2773634B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2824176B1 (fr) * 2001-04-30 2003-10-31 St Microelectronics Sa Procede et dispositif de lecture de cellules de memoire dynamique

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980863A (en) * 1987-03-31 1990-12-25 Kabushiki Kaisha Toshiba Semiconductor memory device having switching circuit for coupling together two pairs of bit lines
JPS63247997A (ja) * 1987-04-01 1988-10-14 Mitsubishi Electric Corp 半導体記憶装置
US5148535A (en) * 1989-08-31 1992-09-15 Tandy Corporation Non-bus request refresh system for shortening refresh timing
JPH07122989B2 (ja) * 1990-06-27 1995-12-25 株式会社東芝 半導体記憶装置
JP2606675B2 (ja) * 1994-10-28 1997-05-07 日本電気株式会社 半導体記憶装置
JPH10106257A (ja) * 1996-09-06 1998-04-24 Texas Instr Inc <Ti> 集積回路のメモリ装置及びプリチャージ動作を与える方法

Also Published As

Publication number Publication date
FR2773634A1 (fr) 1999-07-16

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Legal Events

Date Code Title Description
CD Change of name or company name
ST Notification of lapse

Effective date: 20070930