FR2788882A1 - Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif - Google Patents

Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif Download PDF

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Publication number
FR2788882A1
FR2788882A1 FR9900858A FR9900858A FR2788882A1 FR 2788882 A1 FR2788882 A1 FR 2788882A1 FR 9900858 A FR9900858 A FR 9900858A FR 9900858 A FR9900858 A FR 9900858A FR 2788882 A1 FR2788882 A1 FR 2788882A1
Authority
FR
France
Prior art keywords
face
layer
thickness
active
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR9900858A
Other languages
English (en)
French (fr)
Inventor
Yves Reignoux
Eric Daniel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Axalto SA
Original Assignee
Schlumberger Systemes SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schlumberger Systemes SA filed Critical Schlumberger Systemes SA
Priority to FR9900858A priority Critical patent/FR2788882A1/fr
Priority to JP2000596598A priority patent/JP2002536733A/ja
Priority to US09/890,226 priority patent/US7208822B1/en
Priority to AT00900602T priority patent/ATE376254T1/de
Priority to CNB008036047A priority patent/CN1207782C/zh
Priority to EP00900602A priority patent/EP1147557B1/fr
Priority to PCT/FR2000/000098 priority patent/WO2000045434A1/fr
Priority to ES00900602T priority patent/ES2293891T3/es
Priority to DE60036784T priority patent/DE60036784T2/de
Publication of FR2788882A1 publication Critical patent/FR2788882A1/fr
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
FR9900858A 1999-01-27 1999-01-27 Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif Pending FR2788882A1 (fr)

Priority Applications (9)

Application Number Priority Date Filing Date Title
FR9900858A FR2788882A1 (fr) 1999-01-27 1999-01-27 Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif
JP2000596598A JP2002536733A (ja) 1999-01-27 2000-01-18 集積回路デバイス、当該デバイスを用いたスマートカード用の電子ユニット及び当該デバイスの製造方法
US09/890,226 US7208822B1 (en) 1999-01-27 2000-01-18 Integrated circuit device, electronic module for chip cards using said device and method for making same
AT00900602T ATE376254T1 (de) 1999-01-27 2000-01-18 Integrierte schaltungsanordnung, elektronisches modul für chipkarte, das die anordnung benutzt, und verfahren zu deren herstellung
CNB008036047A CN1207782C (zh) 1999-01-27 2000-01-18 集成电路器件、用于智能卡的电子部件及制造该器件的方法
EP00900602A EP1147557B1 (fr) 1999-01-27 2000-01-18 Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif
PCT/FR2000/000098 WO2000045434A1 (fr) 1999-01-27 2000-01-18 Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif
ES00900602T ES2293891T3 (es) 1999-01-27 2000-01-18 Dispositivo con circuitos integrados, modulo electronico para tarjetas de chip que utiliza el dispositivo y proceso de fabricacion de dicho dispositivo.
DE60036784T DE60036784T2 (de) 1999-01-27 2000-01-18 Integrierte schaltungsanordnung, elektronisches modul für chipkarte, das die anordnung benutzt, und verfahren zu deren herstellung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9900858A FR2788882A1 (fr) 1999-01-27 1999-01-27 Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif

Publications (1)

Publication Number Publication Date
FR2788882A1 true FR2788882A1 (fr) 2000-07-28

Family

ID=9541247

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9900858A Pending FR2788882A1 (fr) 1999-01-27 1999-01-27 Dispositif a circuits integres, module electronique pour carte a puce utilisant le dispositif et procede de fabrication dudit dispositif

Country Status (9)

Country Link
US (1) US7208822B1 (enExample)
EP (1) EP1147557B1 (enExample)
JP (1) JP2002536733A (enExample)
CN (1) CN1207782C (enExample)
AT (1) ATE376254T1 (enExample)
DE (1) DE60036784T2 (enExample)
ES (1) ES2293891T3 (enExample)
FR (1) FR2788882A1 (enExample)
WO (1) WO2000045434A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002071326A1 (de) * 2001-03-07 2002-09-12 Infineon Technologies Ag Chipkartenmodul

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7449780B2 (en) * 2003-03-31 2008-11-11 Intel Corporation Apparatus to minimize thermal impedance using copper on die backside
JP4058637B2 (ja) * 2003-10-27 2008-03-12 セイコーエプソン株式会社 半導体チップ、半導体装置、回路基板及び電子機器
US20060270106A1 (en) * 2005-05-31 2006-11-30 Tz-Cheng Chiu System and method for polymer encapsulated solder lid attach
USD707682S1 (en) * 2012-12-05 2014-06-24 Logomotion, S.R.O. Memory card
TWI559495B (zh) * 2013-07-24 2016-11-21 精材科技股份有限公司 晶片封裝體及其製造方法
US9117721B1 (en) * 2014-03-20 2015-08-25 Excelitas Canada, Inc. Reduced thickness and reduced footprint semiconductor packaging

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JPS6091489A (ja) * 1983-10-24 1985-05-22 Nippon Telegr & Teleph Corp <Ntt> 静電対策ｉｃカ−ド
JPH022095A (ja) * 1988-06-10 1990-01-08 Ricoh Co Ltd Ｉｃモジュールの製造方法及びｉｃモジュール用基材
JPH04207061A (ja) * 1990-11-30 1992-07-29 Shinko Electric Ind Co Ltd 半導体装置
US5155068A (en) * 1989-08-31 1992-10-13 Sharp Kabushiki Kaisha Method for manufacturing an IC module for an IC card whereby an IC device and surrounding encapsulant are thinned by material removal
EP0508266A1 (en) * 1991-04-08 1992-10-14 Motorola, Inc. Semiconductor device having reduced die stress and process for making the same
JPH04341896A (ja) * 1991-05-20 1992-11-27 Hitachi Ltd 半導体装置及びメモリーカード
EP0712159A2 (en) * 1994-11-08 1996-05-15 Oki Electric Industry Co., Ltd. Structure of resin molded type semiconductor
US5777391A (en) * 1994-12-20 1998-07-07 Hitachi, Ltd. Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof
US5811877A (en) * 1994-08-30 1998-09-22 Hitachi, Ltd. Semiconductor device structure

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DE3051195C2 (de) * 1980-08-05 1997-08-28 Gao Ges Automation Org Trägerelement zum Einbau in Ausweiskarten
DE3151408C1 (de) * 1981-12-24 1983-06-01 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Ausweiskarte mit einem IC-Baustein
FR2584235B1 (fr) * 1985-06-26 1988-04-22 Bull Sa Procede de montage d'un circuit integre sur un support, dispositif en resultant et son application a une carte a microcircuits electroniques
US4975761A (en) * 1989-09-05 1990-12-04 Advanced Micro Devices, Inc. High performance plastic encapsulated package for integrated circuit die
US5422435A (en) * 1992-05-22 1995-06-06 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing
DE4443767A1 (de) * 1994-12-08 1996-06-13 Giesecke & Devrient Gmbh Elektronisches Modul und Datenträger mit elektrischem Modul
US5648684A (en) * 1995-07-26 1997-07-15 International Business Machines Corporation Endcap chip with conductive, monolithic L-connect for multichip stack
FR2738077B1 (fr) * 1995-08-23 1997-09-19 Schlumberger Ind Sa Micro-boitier electronique pour carte a memoire electronique et procede de realisation

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JPS6091489A (ja) * 1983-10-24 1985-05-22 Nippon Telegr & Teleph Corp <Ntt> 静電対策ｉｃカ−ド
JPH022095A (ja) * 1988-06-10 1990-01-08 Ricoh Co Ltd Ｉｃモジュールの製造方法及びｉｃモジュール用基材
US5155068A (en) * 1989-08-31 1992-10-13 Sharp Kabushiki Kaisha Method for manufacturing an IC module for an IC card whereby an IC device and surrounding encapsulant are thinned by material removal
JPH04207061A (ja) * 1990-11-30 1992-07-29 Shinko Electric Ind Co Ltd 半導体装置
EP0508266A1 (en) * 1991-04-08 1992-10-14 Motorola, Inc. Semiconductor device having reduced die stress and process for making the same
JPH04341896A (ja) * 1991-05-20 1992-11-27 Hitachi Ltd 半導体装置及びメモリーカード
US5811877A (en) * 1994-08-30 1998-09-22 Hitachi, Ltd. Semiconductor device structure
EP0712159A2 (en) * 1994-11-08 1996-05-15 Oki Electric Industry Co., Ltd. Structure of resin molded type semiconductor
US5777391A (en) * 1994-12-20 1998-07-07 Hitachi, Ltd. Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof

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Title
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PATENT ABSTRACTS OF JAPAN vol. 014, no. 132 (M - 0948) 13 March 1990 (1990-03-13) *
PATENT ABSTRACTS OF JAPAN vol. 016, no. 542 (E - 1290) 12 November 1992 (1992-11-12) *
PATENT ABSTRACTS OF JAPAN vol. 017, no. 196 (M - 1397) 16 April 1993 (1993-04-16) *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002071326A1 (de) * 2001-03-07 2002-09-12 Infineon Technologies Ag Chipkartenmodul

Also Published As

Publication number Publication date
DE60036784D1 (de) 2007-11-29
CN1207782C (zh) 2005-06-22
EP1147557B1 (fr) 2007-10-17
JP2002536733A (ja) 2002-10-29
DE60036784T2 (de) 2008-07-24
ES2293891T3 (es) 2008-04-01
WO2000045434A1 (fr) 2000-08-03
EP1147557A1 (fr) 2001-10-24
US7208822B1 (en) 2007-04-24
CN1340212A (zh) 2002-03-13
ATE376254T1 (de) 2007-11-15

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