FR2761191B1 - Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot - Google Patents

Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot

Info

Publication number
FR2761191B1
FR2761191B1 FR9703578A FR9703578A FR2761191B1 FR 2761191 B1 FR2761191 B1 FR 2761191B1 FR 9703578 A FR9703578 A FR 9703578A FR 9703578 A FR9703578 A FR 9703578A FR 2761191 B1 FR2761191 B1 FR 2761191B1
Authority
FR
France
Prior art keywords
checking
word
content
reference voltage
voltage generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9703578A
Other languages
English (en)
Other versions
FR2761191A1 (fr
Inventor
Jean Devin
Bruno Leconte
Alessandro Brigati
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9703578A priority Critical patent/FR2761191B1/fr
Priority to US09/035,654 priority patent/US5953253A/en
Publication of FR2761191A1 publication Critical patent/FR2761191A1/fr
Application granted granted Critical
Publication of FR2761191B1 publication Critical patent/FR2761191B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage
FR9703578A 1997-03-20 1997-03-20 Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot Expired - Fee Related FR2761191B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9703578A FR2761191B1 (fr) 1997-03-20 1997-03-20 Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot
US09/035,654 US5953253A (en) 1997-03-20 1998-03-06 Word addressable floating-gate memory comprising a reference voltage generator circuit for the verification of the contents of a word

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9703578A FR2761191B1 (fr) 1997-03-20 1997-03-20 Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot

Publications (2)

Publication Number Publication Date
FR2761191A1 FR2761191A1 (fr) 1998-09-25
FR2761191B1 true FR2761191B1 (fr) 1999-06-25

Family

ID=9505130

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9703578A Expired - Fee Related FR2761191B1 (fr) 1997-03-20 1997-03-20 Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot

Country Status (2)

Country Link
US (1) US5953253A (fr)
FR (1) FR2761191B1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3366264B2 (ja) * 1998-09-28 2003-01-14 エヌイーシーマイクロシステム株式会社 不揮発性メモリ、メモリ検査方法
KR100521364B1 (ko) * 2002-11-18 2005-10-12 삼성전자주식회사 플레쉬 메모리 셀들의 프로그램 오판을 방지하고 균일한문턱 전압 산포를 가질 수 있는 플레쉬 메모리 장치 및 그프로그램 검증 방법
DE10327284B4 (de) * 2003-06-17 2005-11-03 Infineon Technologies Ag Prüflesevorrichtung für Speicher
US8116159B2 (en) * 2005-03-30 2012-02-14 Ovonyx, Inc. Using a bit specific reference level to read a resistive memory

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2548429B1 (fr) * 1983-06-28 1988-12-30 Efcis Memoire permanente organisee en deux demi-plans pour ameliorer la vitesse de lecture
JPS63153799A (ja) * 1986-08-08 1988-06-27 Nec Corp 半導体メモリ
US5142495A (en) * 1989-03-10 1992-08-25 Intel Corporation Variable load for margin mode
JPH08167296A (ja) * 1994-12-08 1996-06-25 Nippon Motorola Ltd 半導体記憶装置
US5715195A (en) * 1995-07-19 1998-02-03 Texas Instruments Incorporated Programmable memory verify "0" and verify "1" circuit and method
US5568426A (en) * 1995-07-26 1996-10-22 Micron Quantum Devices, Inc. Method and apparatus for performing memory cell verification on a nonvolatile memory circuit
US5579262A (en) * 1996-02-05 1996-11-26 Integrated Silicon Solution, Inc. Program verify and erase verify control circuit for EPROM/flash

Also Published As

Publication number Publication date
US5953253A (en) 1999-09-14
FR2761191A1 (fr) 1998-09-25

Similar Documents

Publication Publication Date Title
KR950703763A (ko) 고장허용 한계를 갖는 메모리장치
DE69427334D1 (de) Direktspeicherzugriffssteuerung
DE69430683D1 (de) Halbleiterspeicheranordnung
DE69129138D1 (de) DRAM mit einem Wortleitungsbetriebsschaltungssystem
FR2729499B1 (fr) Generateur de tension de survoltage d'un dispositif de memoire a semi-conducteurs
DE69416538D1 (de) Assoziativspeicher
DE69427512D1 (de) Direktspeicherzugriffssteuerung
DE69530895D1 (de) Befehlsvorausladungsschaltung und Cachespeicher
FR2724635B1 (fr) Coffret de stockage d'un dispositif de memoire
FR2761191B1 (fr) Memoire a grille flottante adressable par mots comportant un circuit generateur de tension de reference pour la verification du contenu d'un mot
DE69422453D1 (de) Doppelzugriffspeicher
DE69616626D1 (de) Direktspeicherzugriffssteuerung
FR2739737B1 (fr) Perfectionnements aux cartes a memoire
FR2694120B1 (fr) Circuit de gestion de mots mémoires.
FR2751778B1 (fr) Memoire accessible en lecture seulement
DE69417077D1 (de) Festwertspeicher
DE69619358D1 (de) Redundanzspeicherregister
FR2739706B1 (fr) Perfectionnements aux cartes a memoire
DE69615447D1 (de) Serieller Zugriffspeicher mit reduzierter Kreisverzögerung
FI922707A (fi) Piirikortille asennetun mikroprosessorin ohjelmamuistin ohjelmoiminen
KR970007134U (ko) 셀프 테스트 기능을 갖는 메모리장치
DE69316132D1 (de) Eine Diskettenspeichersteuerung beinhaltende Bereitschaftsignalserzeugungs-Funktion
DE69429975D1 (de) Nichtflüchtige Speicheranordnung
DE69520580D1 (de) Hierarchische Speicheranordnung
KR970004023A (ko) 불휘발성 메모리 장치

Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20071130