FR2489555B1 - - Google Patents
Info
- Publication number
- FR2489555B1 FR2489555B1 FR8116379A FR8116379A FR2489555B1 FR 2489555 B1 FR2489555 B1 FR 2489555B1 FR 8116379 A FR8116379 A FR 8116379A FR 8116379 A FR8116379 A FR 8116379A FR 2489555 B1 FR2489555 B1 FR 2489555B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3824—Operand accessing
- G06F9/3834—Maintaining memory consistency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55118628A JPS6028015B2 (ja) | 1980-08-28 | 1980-08-28 | 情報処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2489555A1 FR2489555A1 (fr) | 1982-03-05 |
FR2489555B1 true FR2489555B1 (fr) | 1984-04-06 |
Family
ID=14741232
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8116379A Granted FR2489555A1 (fr) | 1980-08-28 | 1981-08-27 | Systeme de traitement de donnees a commande par pipeline |
Country Status (3)
Country | Link |
---|---|
US (1) | US4476525A (fr) |
JP (1) | JPS6028015B2 (fr) |
FR (1) | FR2489555A1 (fr) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58189738A (ja) * | 1982-04-30 | 1983-11-05 | Hitachi Ltd | デ−タ処理システム |
JPS6015746A (ja) * | 1983-07-08 | 1985-01-26 | Hitachi Ltd | デ−タ処理装置 |
US4710866A (en) * | 1983-09-12 | 1987-12-01 | Motorola, Inc. | Method and apparatus for validating prefetched instruction |
US4757445A (en) * | 1983-09-12 | 1988-07-12 | Motorola, Inc. | Method and apparatus for validating prefetched instruction |
JPS60120439A (ja) * | 1983-12-05 | 1985-06-27 | Nec Corp | 演算処理装置 |
US4630195A (en) * | 1984-05-31 | 1986-12-16 | International Business Machines Corporation | Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage |
JPH0769818B2 (ja) * | 1984-10-31 | 1995-07-31 | 株式会社日立製作所 | デ−タ処理装置 |
US4766566A (en) * | 1986-08-18 | 1988-08-23 | International Business Machines Corp. | Performance enhancement scheme for a RISC type VLSI processor using dual execution units for parallel instruction processing |
US5185870A (en) * | 1987-04-10 | 1993-02-09 | Tandem Computers, Inc, | System to determine if modification of first macroinstruction to execute in fewer clock cycles |
JPH081599B2 (ja) * | 1988-02-24 | 1996-01-10 | 三菱電機株式会社 | データ処理装置 |
US5202967A (en) * | 1988-08-09 | 1993-04-13 | Matsushita Electric Industrial Co., Ltd. | Data processing apparatus for performing parallel decoding and parallel execution of a variable word length instruction |
JP2810068B2 (ja) * | 1988-11-11 | 1998-10-15 | 株式会社日立製作所 | プロセッサシステム、コンピュータシステム及び命令処理方法 |
US5099421A (en) * | 1988-12-30 | 1992-03-24 | International Business Machine Corporation | Variable length pipe operations sequencing |
US4985825A (en) * | 1989-02-03 | 1991-01-15 | Digital Equipment Corporation | System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer |
US5167026A (en) * | 1989-02-03 | 1992-11-24 | Digital Equipment Corporation | Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers |
DE69030931T2 (de) * | 1989-04-24 | 1998-01-15 | Ibm | Mehrfachsequenzprozessorsystem |
CA2016068C (fr) * | 1989-05-24 | 2000-04-04 | Robert W. Horst | Architecture d'ordinateur pour l'emission d'instructions multiples |
DE69032812T2 (de) * | 1989-07-07 | 1999-04-29 | Hitachi Ltd | Vorrichtung und Verfahren zur parallelen Verarbeitung |
US5197137A (en) * | 1989-07-28 | 1993-03-23 | International Business Machines Corporation | Computer architecture for the concurrent execution of sequential programs |
JP2816248B2 (ja) * | 1989-11-08 | 1998-10-27 | 株式会社日立製作所 | データプロセッサ |
JP2507638B2 (ja) * | 1989-12-01 | 1996-06-12 | 三菱電機株式会社 | デ―タ処理装置 |
US5203002A (en) * | 1989-12-27 | 1993-04-13 | Wetzel Glen F | System with a multiport memory and N processing units for concurrently/individually executing 2N-multi-instruction-words at first/second transitions of a single clock cycle |
AU629007B2 (en) * | 1989-12-29 | 1992-09-24 | Sun Microsystems, Inc. | Apparatus for accelerating store operations in a risc computer |
US5295249A (en) * | 1990-05-04 | 1994-03-15 | International Business Machines Corporation | Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel |
JP2532300B2 (ja) * | 1990-10-17 | 1996-09-11 | 三菱電機株式会社 | 並列処理装置における命令供給装置 |
GB9027853D0 (en) * | 1990-12-21 | 1991-02-13 | Inmos Ltd | Multiple instruction issue |
JPH04340145A (ja) * | 1991-05-17 | 1992-11-26 | Nec Corp | キャッシュメモリ装置 |
US5961629A (en) * | 1991-07-08 | 1999-10-05 | Seiko Epson Corporation | High performance, superscalar-based computer system with out-of-order instruction execution |
US5493687A (en) | 1991-07-08 | 1996-02-20 | Seiko Epson Corporation | RISC microprocessor architecture implementing multiple typed register sets |
US5539911A (en) | 1991-07-08 | 1996-07-23 | Seiko Epson Corporation | High-performance, superscalar-based computer system with out-of-order instruction execution |
US5283874A (en) * | 1991-10-21 | 1994-02-01 | Intel Corporation | Cross coupling mechanisms for simultaneously completing consecutive pipeline instructions even if they begin to process at the same microprocessor of the issue fee |
EP0544083A3 (en) * | 1991-11-26 | 1994-09-14 | Ibm | Interleaved risc-type parallel processor and processing methods |
EP0636256B1 (fr) | 1992-03-31 | 1997-06-04 | Seiko Epson Corporation | Planification d'instructions d'un processeur RISC superscalaire |
US5438668A (en) * | 1992-03-31 | 1995-08-01 | Seiko Epson Corporation | System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer |
EP0638183B1 (fr) | 1992-05-01 | 1997-03-05 | Seiko Epson Corporation | Systeme et procede permettant d'annuler des instructions dans un microprocesseur superscalaire |
EP0663083B1 (fr) * | 1992-09-29 | 2000-12-20 | Seiko Epson Corporation | Systeme et procede pour la gestion des operations de chargement et/ou de stockage dans un microprocesseur superscalaire |
US6735685B1 (en) | 1992-09-29 | 2004-05-11 | Seiko Epson Corporation | System and method for handling load and/or store operations in a superscalar microprocessor |
JP3531166B2 (ja) | 1992-12-31 | 2004-05-24 | セイコーエプソン株式会社 | レジスタ・リネーミングのシステム及び方法 |
US5628021A (en) | 1992-12-31 | 1997-05-06 | Seiko Epson Corporation | System and method for assigning tags to control instruction processing in a superscalar processor |
US5870581A (en) * | 1996-12-20 | 1999-02-09 | Oak Technology, Inc. | Method and apparatus for performing concurrent write operations to a single-write-input register file and an accumulator register |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3840861A (en) * | 1972-10-30 | 1974-10-08 | Amdahl Corp | Data processing system having an instruction pipeline for concurrently processing a plurality of instructions |
US4025771A (en) * | 1974-03-25 | 1977-05-24 | Hughes Aircraft Company | Pipe line high speed signal processor |
JPS5466048A (en) * | 1977-11-07 | 1979-05-28 | Hitachi Ltd | Information processor |
US4179736A (en) * | 1977-11-22 | 1979-12-18 | Honeywell Information Systems Inc. | Microprogrammed computer control unit capable of efficiently executing a large repertoire of instructions for a high performance data processing unit |
US4305124A (en) * | 1978-06-09 | 1981-12-08 | Ncr Corporation | Pipelined computer |
US4332010A (en) * | 1980-03-17 | 1982-05-25 | International Business Machines Corporation | Cache synonym detection and handling mechanism |
-
1980
- 1980-08-28 JP JP55118628A patent/JPS6028015B2/ja not_active Expired
-
1981
- 1981-08-14 US US06/292,849 patent/US4476525A/en not_active Expired - Lifetime
- 1981-08-27 FR FR8116379A patent/FR2489555A1/fr active Granted
Also Published As
Publication number | Publication date |
---|---|
US4476525A (en) | 1984-10-09 |
JPS6028015B2 (ja) | 1985-07-02 |
JPS5743247A (en) | 1982-03-11 |
FR2489555A1 (fr) | 1982-03-05 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |