FR2435868A1 - Systeme de synchronisation de bits pour transmission de signaux impulsionnels - Google Patents
Systeme de synchronisation de bits pour transmission de signaux impulsionnelsInfo
- Publication number
- FR2435868A1 FR2435868A1 FR7920871A FR7920871A FR2435868A1 FR 2435868 A1 FR2435868 A1 FR 2435868A1 FR 7920871 A FR7920871 A FR 7920871A FR 7920871 A FR7920871 A FR 7920871A FR 2435868 A1 FR2435868 A1 FR 2435868A1
- Authority
- FR
- France
- Prior art keywords
- signal
- pulse signal
- synchronization system
- transmitted pulse
- bit synchronization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/007—Detection of the synchronisation error by features other than the received signal transition detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Dans le système de synchronisation de bits destiné à engendrer un signal de synchronisation correspondant à un signal pulsé transmis, le signal pulsé transmis est transformé en un signal dans lequel le nombre d'impulsions prenant successivement la même polarité est limité pour permettre une détection de fréquence, le signal transformé est intégré en 31, une crête de valeur intégrée est détectée en 41, la sortie d'un générateur d'horloge 5 commandé en tension pour engendrer le signal de synchronisation est traité d'une façon similaire en 22, 32 pour une détection de crête, et le générateur d'horloge est commandé par une tension correspondant à une différence entre lesdites crêtes, grâce à quoi la fréquence du signal d'horloge coïncide avec le débit binaire du signal pulsé transmis.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11245678U JPS5529860U (fr) | 1978-08-18 | 1978-08-18 | |
JP10750178A JPS5534565A (en) | 1978-09-04 | 1978-09-04 | Timing system for pulse transmission |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2435868A1 true FR2435868A1 (fr) | 1980-04-04 |
Family
ID=26447527
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7920871A Pending FR2435868A1 (fr) | 1978-08-18 | 1979-08-17 | Systeme de synchronisation de bits pour transmission de signaux impulsionnels |
Country Status (5)
Country | Link |
---|---|
US (1) | US4320527A (fr) |
DE (1) | DE2933403C3 (fr) |
FR (1) | FR2435868A1 (fr) |
GB (1) | GB2031693A (fr) |
NL (1) | NL7906284A (fr) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4419760A (en) * | 1982-01-29 | 1983-12-06 | Motorola Inc. | Augmented phase-locked loop for very wide range acquisition and method therefor |
JPS60206339A (ja) * | 1984-03-30 | 1985-10-17 | Victor Co Of Japan Ltd | デジタル信号復調装置のビツトクロツク信号発生装置 |
US4878231A (en) * | 1988-03-01 | 1989-10-31 | John Fluke Mfg. Co., Inc. | N-PI phase/frequency detector |
US5027373A (en) * | 1988-03-01 | 1991-06-25 | John Fluke Mfg. Co., Inc. | N-pi phase/frequency detector |
US5331208A (en) * | 1992-08-03 | 1994-07-19 | Nvision, Inc. | Non-retriggerable one-shot circuit |
DE4305244C2 (de) * | 1993-02-20 | 1995-03-23 | Maz Mikroelektronik Anwendungs | Bit-Synchronisierer zum Einsatz in Systemen mit sehr hohen Taktraten |
DE19954890A1 (de) * | 1999-11-15 | 2001-05-23 | Infineon Technologies Ag | Verfahren zur Datenratendetektion und Datenratendetektor sowie Verfahren zur Regelung einer Phasenregelschleife und Phasenregelschleife |
US7873130B2 (en) * | 2005-08-10 | 2011-01-18 | Ludwig Lester F | Frequency comparator utilizing enveloping-event detection via symbolic dynamics of fixed or modulated waveforms |
DE102005046550C5 (de) * | 2005-09-28 | 2009-04-09 | Deutsche Post Ag | Verfahren und Vorrichtung zur Sortierung von Postsendungen |
CN102238121B (zh) * | 2011-04-19 | 2014-08-06 | 无锡辐导微电子有限公司 | 积分解码方法及装置 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3271688A (en) * | 1963-04-17 | 1966-09-06 | Hans W Gschwind | Frequency and phase controlled synchronization circuit |
US3999136A (en) * | 1969-04-02 | 1976-12-21 | Westinghouse Electric Corporation | Pulse repetition frequency detector |
FR2098925A5 (fr) * | 1970-07-31 | 1972-03-10 | Trt Telecom Radio Electr | |
US3646452A (en) * | 1971-02-16 | 1972-02-29 | Ibm | Second order digital phaselock loop |
US3755748A (en) * | 1972-03-06 | 1973-08-28 | Motorola Inc | Digital phase shifter/synchronizer and method of shifting |
JPS561823B2 (fr) * | 1973-12-30 | 1981-01-16 | ||
JPS513160A (fr) * | 1974-06-25 | 1976-01-12 | Matsushita Electric Ind Co Ltd | |
US4019153A (en) * | 1974-10-07 | 1977-04-19 | The Charles Stark Draper Laboratory, Inc. | Digital phase-locked loop filter |
US3934205A (en) * | 1975-01-27 | 1976-01-20 | International Telephone And Telegraph Corporation | Frequency lock loop employing a gated frequency difference detector having positive, zero and negative threshold detectors |
US3982194A (en) * | 1975-02-18 | 1976-09-21 | Digital Equipment Corporation | Phase lock loop with delay circuits for relative digital decoding over a range of frequencies |
CA1063719A (fr) * | 1975-04-28 | 1979-10-02 | Control Data Corporation | Decodeur a boucle d'asservissement de phase |
US4055814A (en) * | 1976-06-14 | 1977-10-25 | Pertec Computer Corporation | Phase locked loop for synchronizing VCO with digital data pulses |
JPS5915220B2 (ja) * | 1976-12-29 | 1984-04-07 | 松下電器産業株式会社 | 可変周波数シンセサイザ |
US4166249A (en) * | 1978-02-15 | 1979-08-28 | Honeywell Inc. | Digital frequency-lock circuit |
-
1979
- 1979-08-15 US US06/066,643 patent/US4320527A/en not_active Expired - Lifetime
- 1979-08-17 NL NL7906284A patent/NL7906284A/nl not_active Application Discontinuation
- 1979-08-17 GB GB7928744A patent/GB2031693A/en not_active Withdrawn
- 1979-08-17 DE DE2933403A patent/DE2933403C3/de not_active Expired
- 1979-08-17 FR FR7920871A patent/FR2435868A1/fr active Pending
Also Published As
Publication number | Publication date |
---|---|
DE2933403B2 (fr) | 1981-02-26 |
DE2933403A1 (de) | 1980-03-27 |
NL7906284A (nl) | 1980-02-20 |
US4320527A (en) | 1982-03-16 |
DE2933403C3 (de) | 1981-11-05 |
GB2031693A (en) | 1980-04-23 |
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