FR2423818A1 - Generateur de signaux d'horloge sans recouvrement - Google Patents
Generateur de signaux d'horloge sans recouvrementInfo
- Publication number
- FR2423818A1 FR2423818A1 FR7811235A FR7811235A FR2423818A1 FR 2423818 A1 FR2423818 A1 FR 2423818A1 FR 7811235 A FR7811235 A FR 7811235A FR 7811235 A FR7811235 A FR 7811235A FR 2423818 A1 FR2423818 A1 FR 2423818A1
- Authority
- FR
- France
- Prior art keywords
- mos transistors
- inverters
- timing signal
- circuit
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
- H03K5/1515—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs non-overlapping
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Abstract
L'invention concerne un générateur d'horloge biphasée. Selon l'invention, un inverseur T1 reçoit sur l'entrée E un signal d'horloge extérieur. Un deuxième inverseur T2 est connecté entre tension d'alimentation VDD et la sortie A de T1. Un troisième inverseur est connecté entre l'entrée E et la tension d'alimentation et reçoit le signal de sortie de T1. Les signaux d'horloge sans recouvrement sont obtenus sur les sorties K1 et K2 après inversion des signaux de sortie des transistors T2 et T3 respectivement. L'invention s'applique dans les circuits MOS à fonctionnement dynamique.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7811235A FR2423818A1 (fr) | 1978-04-17 | 1978-04-17 | Generateur de signaux d'horloge sans recouvrement |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7811235A FR2423818A1 (fr) | 1978-04-17 | 1978-04-17 | Generateur de signaux d'horloge sans recouvrement |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2423818A1 true FR2423818A1 (fr) | 1979-11-16 |
Family
ID=9207208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7811235A Withdrawn FR2423818A1 (fr) | 1978-04-17 | 1978-04-17 | Generateur de signaux d'horloge sans recouvrement |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2423818A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0200266A1 (fr) * | 1985-04-26 | 1986-11-05 | Laboratoires D'electronique Philips | Circuit générateur de signaux alternatifs complémentaires |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3596108A (en) * | 1969-10-27 | 1971-07-27 | Teletype Corp | Fet logic gate circuits |
-
1978
- 1978-04-17 FR FR7811235A patent/FR2423818A1/fr not_active Withdrawn
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3596108A (en) * | 1969-10-27 | 1971-07-27 | Teletype Corp | Fet logic gate circuits |
Non-Patent Citations (2)
Title |
---|
EXBK/75 * |
EXBK/76 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0200266A1 (fr) * | 1985-04-26 | 1986-11-05 | Laboratoires D'electronique Philips | Circuit générateur de signaux alternatifs complémentaires |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |