FR2380638A1 - Procede de fabrication de dispositifs a semi-conducteur - Google Patents

Procede de fabrication de dispositifs a semi-conducteur

Info

Publication number
FR2380638A1
FR2380638A1 FR7803255A FR7803255A FR2380638A1 FR 2380638 A1 FR2380638 A1 FR 2380638A1 FR 7803255 A FR7803255 A FR 7803255A FR 7803255 A FR7803255 A FR 7803255A FR 2380638 A1 FR2380638 A1 FR 2380638A1
Authority
FR
France
Prior art keywords
maximum concentration
platinum
wafer
interface
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7803255A
Other languages
English (en)
Other versions
FR2380638B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2380638A1 publication Critical patent/FR2380638A1/fr
Application granted granted Critical
Publication of FR2380638B1 publication Critical patent/FR2380638B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28537Deposition of Schottky electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne les connexions à barrière de Schottky. Elle se rapporte à un procédé qui comprend l'implantation d'ions à une profondeur particulière dans une plaquette, le dépôt d'une matière convenable de contact telle que le platine, puis le chauffage de la plaquette afin que le platine et le silicium réagissent, l'interface du siliciure et du silicium pénétrant plus loin que la partie de concentration maximale formée par implantation des ions si bien que ceux-ci sont chassés par l'interface qui avance et prennent une concentration maximale supérieure à la concentration maximale initiale. La tension de mise à l'état conducteur peut ainsi être réduite dans le sens direct. Application à la réalisation de disposition à semi-conducteur et de circuits intégrés pour microélectronique.
FR7803255A 1977-02-11 1978-02-06 Procede de fabrication de dispositifs a semi-conducteur Granted FR2380638A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/767,681 US4107835A (en) 1977-02-11 1977-02-11 Fabrication of semiconductive devices

Publications (2)

Publication Number Publication Date
FR2380638A1 true FR2380638A1 (fr) 1978-09-08
FR2380638B1 FR2380638B1 (fr) 1982-04-16

Family

ID=25080230

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7803255A Granted FR2380638A1 (fr) 1977-02-11 1978-02-06 Procede de fabrication de dispositifs a semi-conducteur

Country Status (6)

Country Link
US (1) US4107835A (fr)
JP (1) JPS5846072B2 (fr)
CA (1) CA1078529A (fr)
DE (1) DE2805442A1 (fr)
FR (1) FR2380638A1 (fr)
GB (1) GB1574582A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2513011A1 (fr) * 1980-09-15 1983-03-18 Gen Electric Procede de fabrication de contacts a faible resistance dans des dispositifs a semi-conducteur
FR2588120A1 (fr) * 1985-10-01 1987-04-03 Sgs Microelettronica Spa Procede et appareil correspondant pour etablir des contacts de type ohmique entre un metal et un semi-conducteur

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4307131A (en) * 1976-01-30 1981-12-22 Thomson-Csf Method of manufacturing metal-semiconductor contacts exhibiting high injected current density
US5434438A (en) * 1976-09-13 1995-07-18 Texas Instruments Inc. Random access memory cell with a capacitor
JPS5669844A (en) * 1979-11-10 1981-06-11 Toshiba Corp Manufacture of semiconductor device
USRE32613E (en) * 1980-04-17 1988-02-23 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device
US4394673A (en) * 1980-09-29 1983-07-19 International Business Machines Corporation Rare earth silicide Schottky barriers
US4656498A (en) * 1980-10-27 1987-04-07 Texas Instruments Incorporated Oxide-isolated integrated Schottky logic
US4665414A (en) * 1982-07-23 1987-05-12 American Telephone And Telegraph Company, At&T Bell Laboratories Schottky-barrier MOS devices
JPS59108170U (ja) * 1983-01-10 1984-07-20 ダイキン工業株式会社 製氷機
JPS6061747U (ja) * 1983-10-04 1985-04-30 日本電気株式会社 半導体装置
US4619035A (en) * 1984-06-23 1986-10-28 Nippon Gakki Seizo Kabushiki Kaisha Method of manufacturing a semiconductor device including Schottky barrier diodes
JPS6263686U (fr) * 1985-10-11 1987-04-20
US4914042A (en) * 1986-09-30 1990-04-03 Colorado State University Research Foundation Forming a transition metal silicide radiation detector and source
US4785230A (en) * 1987-04-24 1988-11-15 Texas Instruments Incorporated Temperature and power supply independent voltage reference for integrated circuits
GB8907898D0 (en) * 1989-04-07 1989-05-24 Inmos Ltd Semiconductor devices and fabrication thereof
US5851891A (en) * 1997-04-21 1998-12-22 Advanced Micro Devices, Inc. IGFET method of forming with silicide contact on ultra-thin gate
DE10208904B4 (de) * 2002-02-28 2007-03-01 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung unterschiedlicher Silicidbereiche auf verschiedenen Silicium enthaltenden Gebieten in einem Halbleiterelement
DE10208728B4 (de) 2002-02-28 2009-05-07 Advanced Micro Devices, Inc., Sunnyvale Ein Verfahren zur Herstellung eines Halbleiterelements mit unterschiedlichen Metallsilizidbereichen
DE10209059B4 (de) * 2002-03-01 2007-04-05 Advanced Micro Devices, Inc., Sunnyvale Ein Halbleiterelement mit unterschiedlichen Metall-Halbleiterbereichen, die auf einem Halbleitergebiet gebildet sind, und Verfahren zur Herstellung des Halbleiterelements
DE10214065B4 (de) * 2002-03-28 2006-07-06 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines verbesserten Metallsilizidbereichs in einem Silizium enthaltenden leitenden Gebiet in einer integrierten Schaltung
DE10217610B4 (de) * 2002-04-19 2005-11-03 Infineon Technologies Ag Metall-Halbleiter-Kontakt, Halbleiterbauelement, integrierte Schaltungsanordnung und Verfahren
DE10234931A1 (de) * 2002-07-31 2004-02-26 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines Metallsilizidgates in einer standardmässigen MOS-Prozesssequenz
US6815235B1 (en) 2002-11-25 2004-11-09 Advanced Micro Devices, Inc. Methods of controlling formation of metal silicide regions, and system for performing same
US7611943B2 (en) * 2004-10-20 2009-11-03 Texas Instruments Incorporated Transistors, integrated circuits, systems, and processes of manufacture with improved work function modulation
US10304938B2 (en) 2016-09-01 2019-05-28 International Business Machines Corporation Maskless method to reduce source-drain contact resistance in CMOS devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3938243A (en) * 1973-02-20 1976-02-17 Signetics Corporation Schottky barrier diode semiconductor structure and method
US3995301A (en) * 1973-03-23 1976-11-30 Ibm Corporation Novel integratable Schottky Barrier structure and a method for the fabrication thereof
DE2315710C3 (de) * 1973-03-29 1975-11-13 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Herstellen einer Halbleiteranordnung
US3968272A (en) * 1974-01-25 1976-07-06 Microwave Associates, Inc. Zero-bias Schottky barrier detector diodes
US3918149A (en) * 1974-06-28 1975-11-11 Intel Corp Al/Si metallization process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2513011A1 (fr) * 1980-09-15 1983-03-18 Gen Electric Procede de fabrication de contacts a faible resistance dans des dispositifs a semi-conducteur
FR2588120A1 (fr) * 1985-10-01 1987-04-03 Sgs Microelettronica Spa Procede et appareil correspondant pour etablir des contacts de type ohmique entre un metal et un semi-conducteur

Also Published As

Publication number Publication date
JPS5846072B2 (ja) 1983-10-14
GB1574582A (en) 1980-09-10
FR2380638B1 (fr) 1982-04-16
CA1078529A (fr) 1980-05-27
US4107835A (en) 1978-08-22
DE2805442A1 (de) 1978-08-17
JPS5399776A (en) 1978-08-31

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