FR2379200A1 - Circuit a transistors a effet de champ utilisant un potentiel de substrat pour mettre hors circuit des dispositifs travaillant en mode d'appauvrissement - Google Patents

Circuit a transistors a effet de champ utilisant un potentiel de substrat pour mettre hors circuit des dispositifs travaillant en mode d'appauvrissement

Info

Publication number
FR2379200A1
FR2379200A1 FR7739914A FR7739914A FR2379200A1 FR 2379200 A1 FR2379200 A1 FR 2379200A1 FR 7739914 A FR7739914 A FR 7739914A FR 7739914 A FR7739914 A FR 7739914A FR 2379200 A1 FR2379200 A1 FR 2379200A1
Authority
FR
France
Prior art keywords
potential
field
effect transistor
transistor circuit
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7739914A
Other languages
English (en)
Other versions
FR2379200B1 (fr
Inventor
Ronald W Knepper
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2379200A1 publication Critical patent/FR2379200A1/fr
Application granted granted Critical
Publication of FR2379200B1 publication Critical patent/FR2379200B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01714—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
    • H03K19/09445—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)

Abstract

Circuit à transistors à effet de champ. Il utilise trois sources de tension +V, la masse, et une tension dérivée du substrat V SUB négative. Un étage d'entrée connecté entre +V et la masse est composé de T1 et T2 alimenté par des signaux logiques complementaires entre les deux premières tensions. Le couplage capacitif CB permet d'amener le noeud N2 à un potentiel permettant la conduction des transistors T4 et T7 permettant au noeud de sortie de passer du potentiel +V à un potentiel proche de V SUB. Ce potentiel est suffisant pour mettre hors circuit les transistors à effet de champ travaillant en mode d'appauvrissement des étages ultérieurs. Peut être utilisé par exemple dans les mémoires intégrées ou dans les circuits de restauration.
FR7739914A 1977-01-31 1977-12-23 Circuit a transistors a effet de champ utilisant un potentiel de substrat pour mettre hors circuit des dispositifs travaillant en mode d'appauvrissement Granted FR2379200A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/764,494 US4093875A (en) 1977-01-31 1977-01-31 Field effect transistor (FET) circuit utilizing substrate potential for turning off depletion mode devices

Publications (2)

Publication Number Publication Date
FR2379200A1 true FR2379200A1 (fr) 1978-08-25
FR2379200B1 FR2379200B1 (fr) 1980-08-22

Family

ID=25070892

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7739914A Granted FR2379200A1 (fr) 1977-01-31 1977-12-23 Circuit a transistors a effet de champ utilisant un potentiel de substrat pour mettre hors circuit des dispositifs travaillant en mode d'appauvrissement

Country Status (6)

Country Link
US (1) US4093875A (fr)
JP (1) JPS5396660A (fr)
DE (1) DE2802595C2 (fr)
FR (1) FR2379200A1 (fr)
GB (1) GB1542239A (fr)
IT (1) IT1114184B (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1573771A (en) * 1977-09-26 1980-08-28 Philips Electronic Associated Buffer circuit
US4176289A (en) * 1978-06-23 1979-11-27 Electronic Memories & Magnetics Corporation Driving circuit for integrated circuit semiconductor memory
US4356412A (en) * 1979-03-05 1982-10-26 Motorola, Inc. Substrate bias regulator
US4500799A (en) * 1980-07-28 1985-02-19 Inmos Corporation Bootstrap driver circuits for an MOS memory
US4570244A (en) * 1980-07-28 1986-02-11 Inmos Corporation Bootstrap driver for a static RAM
JPS5750109A (en) * 1980-09-10 1982-03-24 Toshiba Corp High impedance circuit for integrated circuit
JPS5936427A (ja) * 1982-08-24 1984-02-28 Mitsubishi Electric Corp 出力回路
IT1185851B (it) * 1985-08-02 1987-11-18 Sgs Microelettronica Spa Circuito di pilotaggio con boctstrap in tecnologia n-mos per carichi capacitivi
US5514995A (en) * 1995-01-30 1996-05-07 Micrel, Inc. PCMCIA power interface
CN103178811A (zh) * 2011-12-24 2013-06-26 鸿富锦精密工业（深圳）有限公司 卡装置驱动电路
US9048838B2 (en) * 2013-10-30 2015-06-02 Infineon Technologies Austria Ag Switching circuit
US9525063B2 (en) 2013-10-30 2016-12-20 Infineon Technologies Austria Ag Switching circuit
JP6470284B2 (ja) 2013-11-15 2019-02-13 日本テキサス・インスツルメンツ合同会社 デプリーションモードトランジスタを制御するための方法及び回路要素

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3912948A (en) * 1971-08-30 1975-10-14 Nat Semiconductor Corp Mos bootstrap inverter circuit
DE2521949A1 (de) * 1975-05-16 1976-11-25 Itt Ind Gmbh Deutsche Monolithisch integrierbare mis- treiberstufe

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3609414A (en) * 1968-08-20 1971-09-28 Ibm Apparatus for stabilizing field effect transistor thresholds
US4016476A (en) * 1972-09-20 1977-04-05 Citizen Watch Co., Ltd. Booster circuits
JPS49114337A (fr) * 1973-02-28 1974-10-31
US3938108A (en) * 1975-02-03 1976-02-10 Intel Corporation Erasable programmable read-only memory
US3995172A (en) * 1975-06-05 1976-11-30 International Business Machines Corporation Enhancement-and depletion-type field effect transistors connected in parallel

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3912948A (en) * 1971-08-30 1975-10-14 Nat Semiconductor Corp Mos bootstrap inverter circuit
DE2521949A1 (de) * 1975-05-16 1976-11-25 Itt Ind Gmbh Deutsche Monolithisch integrierbare mis- treiberstufe

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *
NV700/74 *

Also Published As

Publication number Publication date
JPS5396660A (en) 1978-08-24
GB1542239A (en) 1979-03-14
JPS5737257B2 (fr) 1982-08-09
DE2802595A1 (de) 1978-08-03
FR2379200B1 (fr) 1980-08-22
DE2802595C2 (de) 1985-04-18
IT1114184B (it) 1986-01-27
US4093875A (en) 1978-06-06

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Legal Events

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