FR2374782A1 - Circuit inverseur a transistors integres mis - Google Patents
Circuit inverseur a transistors integres misInfo
- Publication number
- FR2374782A1 FR2374782A1 FR7737677A FR7737677A FR2374782A1 FR 2374782 A1 FR2374782 A1 FR 2374782A1 FR 7737677 A FR7737677 A FR 7737677A FR 7737677 A FR7737677 A FR 7737677A FR 2374782 A1 FR2374782 A1 FR 2374782A1
- Authority
- FR
- France
- Prior art keywords
- transistor
- inverter circuit
- gate
- phase
- mis
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
- Dc-Dc Converters (AREA)
Abstract
L'invention concerne un circuit inverseur MIS capable de délivrer un signal de changement d'état synchronisé par une horloge biphasée à partir d'une impulsion d'entrée dont le flanc avant a une durée et une phase aléatoires par rapport aux signaux d'horloge. Les transistors T2, T3 délivrant le signal de changement d'état sont reliés à la grille du transistor T5. Le circuit drain-source de ce transistor relie la grille du transistor T2 au potentiel de masse USS . L'invention s'applique, notamment, dans la conception des inverseurs à technologie MIS pour en améliorer les performances.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19762657281 DE2657281C3 (de) | 1976-12-17 | 1976-12-17 | MIS-Inverterschaltung |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2374782A1 true FR2374782A1 (fr) | 1978-07-13 |
FR2374782B1 FR2374782B1 (fr) | 1983-02-18 |
Family
ID=5995827
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7737677A Granted FR2374782A1 (fr) | 1976-12-17 | 1977-12-14 | Circuit inverseur a transistors integres mis |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS5375850A (fr) |
DE (1) | DE2657281C3 (fr) |
ES (1) | ES465142A1 (fr) |
FR (1) | FR2374782A1 (fr) |
GB (1) | GB1557508A (fr) |
IT (1) | IT1088438B (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2908422A1 (de) * | 1978-03-06 | 1979-09-13 | Citroen Sa | Schleifkopf |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4441037A (en) * | 1980-12-22 | 1984-04-03 | Burroughs Corporation | Internally gated variable pulsewidth clock generator |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2026143A1 (de) * | 1969-05-30 | 1970-12-03 | Sescosem-Societe Europeenne De Semiconducteurs Et De Microelectroniques, Paris | Rauschunempfindliche logische Anordnung |
DE2315201A1 (de) * | 1972-03-27 | 1973-10-11 | Hitachi Ltd | Flip-flop-schaltung |
US3882331A (en) * | 1973-03-05 | 1975-05-06 | Tokyo Shibaura Electric Co | Hysteresis circuits using insulated gate field effect transistors |
-
1976
- 1976-12-17 DE DE19762657281 patent/DE2657281C3/de not_active Expired
-
1977
- 1977-12-08 GB GB5111777A patent/GB1557508A/en not_active Expired
- 1977-12-12 IT IT3057977A patent/IT1088438B/it active
- 1977-12-14 FR FR7737677A patent/FR2374782A1/fr active Granted
- 1977-12-15 JP JP14998677A patent/JPS5375850A/ja active Pending
- 1977-12-16 ES ES465142A patent/ES465142A1/es not_active Expired
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2026143A1 (de) * | 1969-05-30 | 1970-12-03 | Sescosem-Societe Europeenne De Semiconducteurs Et De Microelectroniques, Paris | Rauschunempfindliche logische Anordnung |
DE2315201A1 (de) * | 1972-03-27 | 1973-10-11 | Hitachi Ltd | Flip-flop-schaltung |
US3882331A (en) * | 1973-03-05 | 1975-05-06 | Tokyo Shibaura Electric Co | Hysteresis circuits using insulated gate field effect transistors |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2908422A1 (de) * | 1978-03-06 | 1979-09-13 | Citroen Sa | Schleifkopf |
Also Published As
Publication number | Publication date |
---|---|
DE2657281B2 (de) | 1980-01-03 |
DE2657281A1 (de) | 1978-06-22 |
IT1088438B (it) | 1985-06-10 |
FR2374782B1 (fr) | 1983-02-18 |
GB1557508A (en) | 1979-12-12 |
DE2657281C3 (de) | 1980-09-04 |
JPS5375850A (en) | 1978-07-05 |
ES465142A1 (es) | 1978-10-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
DL | Decision of the director general to leave to make available licences of right | ||
ST | Notification of lapse |