FR2357981A1 - Dispositif de chargement et/ou de dechargement de cles d'adressage ou cles de protection-memoire dans un systeme de traitement de donnees - Google Patents
Dispositif de chargement et/ou de dechargement de cles d'adressage ou cles de protection-memoire dans un systeme de traitement de donneesInfo
- Publication number
- FR2357981A1 FR2357981A1 FR7706852A FR7706852A FR2357981A1 FR 2357981 A1 FR2357981 A1 FR 2357981A1 FR 7706852 A FR7706852 A FR 7706852A FR 7706852 A FR7706852 A FR 7706852A FR 2357981 A1 FR2357981 A1 FR 2357981A1
- Authority
- FR
- France
- Prior art keywords
- keys
- unloading
- loading
- data processing
- addressing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Abstract
Dispositif de chargement et/ou déchargement de clés dans un registre de clés. Des circuits de chargement et/ou déchargement, commandés par les circuits de commande décodent les instructions à exécuter, permettent soit de ne charger ou de ne décharger qu'une des sections du registre de clés, correspondant à un mode d'adressage particulier du système, soit de charger ou décharger l'ensemble du registre. Ces circuits acroissent les possibilités d'adressage et la sécurité des systèmes de traitement de données.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/681,982 US4042913A (en) | 1976-04-30 | 1976-04-30 | Address key register load/store instruction system |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2357981A1 true FR2357981A1 (fr) | 1978-02-03 |
FR2357981B1 FR2357981B1 (fr) | 1980-02-01 |
Family
ID=24737691
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7706852A Granted FR2357981A1 (fr) | 1976-04-30 | 1977-03-02 | Dispositif de chargement et/ou de dechargement de cles d'adressage ou cles de protection-memoire dans un systeme de traitement de donnees |
Country Status (7)
Country | Link |
---|---|
US (1) | US4042913A (fr) |
JP (1) | JPS52132737A (fr) |
AU (1) | AU509665B2 (fr) |
BR (1) | BR7702776A (fr) |
CA (1) | CA1078068A (fr) |
FR (1) | FR2357981A1 (fr) |
SE (1) | SE417550B (fr) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4418275A (en) * | 1979-12-07 | 1983-11-29 | Ncr Corporation | Data hashing method and apparatus |
US4355355A (en) * | 1980-03-19 | 1982-10-19 | International Business Machines Corp. | Address generating mechanism for multiple virtual spaces |
DE3174927D1 (en) * | 1980-05-23 | 1986-08-21 | Ibm | Enhancements in system/370 type of data processing apparatus |
US4587632A (en) * | 1980-05-27 | 1986-05-06 | At&T Bell Laboratories | Lookahead stack oriented computer |
DE3278375D1 (en) * | 1981-02-05 | 1988-05-26 | Ibm | Page addressing mechanism and method for using the same |
JPS58214095A (ja) * | 1982-06-04 | 1983-12-13 | Taisei Corp | 低温タンク |
US4670839A (en) * | 1982-09-27 | 1987-06-02 | Data General Corporation | Encachement apparatus using two caches each responsive to a key for simultaneously accessing and combining data therefrom |
US4652995A (en) * | 1982-09-27 | 1987-03-24 | Data General Corporation | Encachement apparatus using multiple caches for providing multiple component values to form data items |
IT1216087B (it) * | 1988-03-15 | 1990-02-22 | Honeywell Bull Spa | Sistema di memoria con selezione predittiva di modulo. |
US5548746A (en) * | 1993-11-12 | 1996-08-20 | International Business Machines Corporation | Non-contiguous mapping of I/O addresses to use page protection of a process |
US5666506A (en) * | 1994-10-24 | 1997-09-09 | International Business Machines Corporation | Apparatus to dynamically control the out-of-order execution of load/store instructions in a processor capable of dispatchng, issuing and executing multiple instructions in a single processor cycle |
CN109463002B (zh) * | 2015-11-27 | 2023-09-22 | 华为技术有限公司 | 向队列存储数据的方法、装置及设备 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3646522A (en) * | 1969-08-15 | 1972-02-29 | Interdata Inc | General purpose optimized microprogrammed miniprocessor |
US3634883A (en) * | 1969-11-12 | 1972-01-11 | Honeywell Inc | Microinstruction address modification and branch system |
GB1312504A (en) * | 1970-05-20 | 1973-04-04 | Ibm | Control unit for serial data storage apparatus |
US3916387A (en) * | 1971-04-23 | 1975-10-28 | Ibm | Directory searching method and means |
US3855580A (en) * | 1974-01-11 | 1974-12-17 | Gte Automatic Electric Lab Inc | Memory system including addressing arrangement |
US3958227A (en) * | 1974-09-24 | 1976-05-18 | International Business Machines Corporation | Control store system with flexible control word selection |
-
1976
- 1976-04-30 US US05/681,982 patent/US4042913A/en not_active Expired - Lifetime
-
1977
- 1977-03-02 FR FR7706852A patent/FR2357981A1/fr active Granted
- 1977-04-05 CA CA275,571A patent/CA1078068A/fr not_active Expired
- 1977-04-06 JP JP3862077A patent/JPS52132737A/ja active Granted
- 1977-04-29 SE SE7704962A patent/SE417550B/xx unknown
- 1977-04-29 BR BR7702776A patent/BR7702776A/pt unknown
- 1977-05-02 AU AU24747/77A patent/AU509665B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
AU2474777A (en) | 1978-11-09 |
BR7702776A (pt) | 1978-02-21 |
SE417550B (sv) | 1981-03-23 |
CA1078068A (fr) | 1980-05-20 |
JPS5738998B2 (fr) | 1982-08-18 |
FR2357981B1 (fr) | 1980-02-01 |
SE7704962L (sv) | 1977-10-31 |
JPS52132737A (en) | 1977-11-07 |
US4042913A (en) | 1977-08-16 |
AU509665B2 (en) | 1980-05-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |