FR2312172A1 - Procede de fabrication d'ensembles de circuits integres - Google Patents

Procede de fabrication d'ensembles de circuits integres

Info

Publication number
FR2312172A1
FR2312172A1 FR7610362A FR7610362A FR2312172A1 FR 2312172 A1 FR2312172 A1 FR 2312172A1 FR 7610362 A FR7610362 A FR 7610362A FR 7610362 A FR7610362 A FR 7610362A FR 2312172 A1 FR2312172 A1 FR 2312172A1
Authority
FR
France
Prior art keywords
substrate
holes
pins
integrated circuits
contact spots
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7610362A
Other languages
English (en)
French (fr)
Other versions
FR2312172B1 (enExample
Inventor
William J Nestork
John A Paris
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2312172A1 publication Critical patent/FR2312172A1/fr
Application granted granted Critical
Publication of FR2312172B1 publication Critical patent/FR2312172B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H10W70/698—
    • H10W70/611—
    • H10W90/00—
    • H10W90/401—
    • H10W72/07251—
    • H10W72/20—

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Multi-Conductor Connections (AREA)
FR7610362A 1975-05-22 1976-04-01 Procede de fabrication d'ensembles de circuits integres Granted FR2312172A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US58012175A 1975-05-22 1975-05-22

Publications (2)

Publication Number Publication Date
FR2312172A1 true FR2312172A1 (fr) 1976-12-17
FR2312172B1 FR2312172B1 (enExample) 1979-04-20

Family

ID=24319801

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7610362A Granted FR2312172A1 (fr) 1975-05-22 1976-04-01 Procede de fabrication d'ensembles de circuits integres

Country Status (2)

Country Link
DE (1) DE2615758A1 (enExample)
FR (1) FR2312172A1 (enExample)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4257668A (en) * 1979-01-02 1981-03-24 Gte Automatic Electric Laboratories, Inc. Edge clip terminal for mounting thick film hybrid circuits in printed circuit boards
WO1988001437A1 (en) * 1986-08-20 1988-02-25 Plessey Overseas Limited Integrated circuit devices
EP0472451A1 (fr) * 1990-08-21 1992-02-26 Thomson-Csf Structure hybride d'interconnexion de circuits intégrés, et procédé de fabrication
US5367764A (en) * 1991-12-31 1994-11-29 Tessera, Inc. Method of making a multi-layer circuit assembly
EP0619935A4 (en) * 1991-12-31 1995-03-22 Tessera Inc METHOD FOR THE CONSTRUCTION OF MULTI-LAYER CIRCUITS, STRUCTURES WITH PERSONALIZATION CHARACTERISTICS AND COMPONENTS USED IN THEM.
US5570504A (en) * 1991-12-31 1996-11-05 Tessera, Inc. Multi-Layer circuit construction method and structure
US5861666A (en) * 1995-08-30 1999-01-19 Tessera, Inc. Stacked chip assembly
US6121676A (en) * 1996-12-13 2000-09-19 Tessera, Inc. Stacked microelectronic assembly and method therefor
US6699730B2 (en) 1996-12-13 2004-03-02 Tessers, Inc. Stacked microelectronic assembly and method therefor
US7149095B2 (en) 1996-12-13 2006-12-12 Tessera, Inc. Stacked microelectronic assemblies

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1064886A (en) * 1964-03-19 1967-04-12 Irc Inc Improvements in or relating to electrical circuit assemblies
FR1567695A (enExample) * 1967-06-06 1969-05-16

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1064886A (en) * 1964-03-19 1967-04-12 Irc Inc Improvements in or relating to electrical circuit assemblies
FR1567695A (enExample) * 1967-06-06 1969-05-16

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
REVUE US "IBM TECHNICAL DISCLOSURE BULLETIN" VOL. 6 MARS 1964, "MICROELECTRONIC PACKAGING TECHNIQUE" R.M. CHAPMAN ET AL., PAGES 70-71) *

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4257668A (en) * 1979-01-02 1981-03-24 Gte Automatic Electric Laboratories, Inc. Edge clip terminal for mounting thick film hybrid circuits in printed circuit boards
WO1988001437A1 (en) * 1986-08-20 1988-02-25 Plessey Overseas Limited Integrated circuit devices
EP0472451A1 (fr) * 1990-08-21 1992-02-26 Thomson-Csf Structure hybride d'interconnexion de circuits intégrés, et procédé de fabrication
FR2666173A1 (fr) * 1990-08-21 1992-02-28 Thomson Csf Structure hybride d'interconnexion de circuits integres et procede de fabrication.
US5262351A (en) * 1990-08-21 1993-11-16 Thomson-Csf Process for manufacturing a multilayer integrated circuit interconnection
US5367764A (en) * 1991-12-31 1994-11-29 Tessera, Inc. Method of making a multi-layer circuit assembly
EP0619935A4 (en) * 1991-12-31 1995-03-22 Tessera Inc METHOD FOR THE CONSTRUCTION OF MULTI-LAYER CIRCUITS, STRUCTURES WITH PERSONALIZATION CHARACTERISTICS AND COMPONENTS USED IN THEM.
US5558928A (en) * 1991-12-31 1996-09-24 Tessera, Inc. Multi-layer circuit structures, methods of making same and components for use therein
US5570504A (en) * 1991-12-31 1996-11-05 Tessera, Inc. Multi-Layer circuit construction method and structure
US5583321A (en) * 1991-12-31 1996-12-10 Tessera, Inc. Multi-layer circuit construction methods and structures with customization features and components for use therein
US5640761A (en) * 1991-12-31 1997-06-24 Tessera, Inc. Method of making multi-layer circuit
US5861666A (en) * 1995-08-30 1999-01-19 Tessera, Inc. Stacked chip assembly
US6121676A (en) * 1996-12-13 2000-09-19 Tessera, Inc. Stacked microelectronic assembly and method therefor
US6699730B2 (en) 1996-12-13 2004-03-02 Tessers, Inc. Stacked microelectronic assembly and method therefor
US7149095B2 (en) 1996-12-13 2006-12-12 Tessera, Inc. Stacked microelectronic assemblies

Also Published As

Publication number Publication date
DE2615758A1 (de) 1977-01-20
FR2312172B1 (enExample) 1979-04-20

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Legal Events

Date Code Title Description
ST Notification of lapse