FR2285750A1 - Ligne a retard en circuit integre monolithique - Google Patents

Ligne a retard en circuit integre monolithique

Info

Publication number
FR2285750A1
FR2285750A1 FR7528460A FR7528460A FR2285750A1 FR 2285750 A1 FR2285750 A1 FR 2285750A1 FR 7528460 A FR7528460 A FR 7528460A FR 7528460 A FR7528460 A FR 7528460A FR 2285750 A1 FR2285750 A1 FR 2285750A1
Authority
FR
France
Prior art keywords
integrated circuit
delay line
monolithic integrated
circuit delay
monolithic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7528460A
Other languages
English (en)
Inventor
Lothar Blossfeld
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Publication of FR2285750A1 publication Critical patent/FR2285750A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/14—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of delay lines

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
FR7528460A 1974-09-18 1975-09-17 Ligne a retard en circuit integre monolithique Withdrawn FR2285750A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742444486 DE2444486A1 (de) 1974-09-18 1974-09-18 Monolithisch integrierbare verzoegerungsschaltung

Publications (1)

Publication Number Publication Date
FR2285750A1 true FR2285750A1 (fr) 1976-04-16

Family

ID=5926026

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7528460A Withdrawn FR2285750A1 (fr) 1974-09-18 1975-09-17 Ligne a retard en circuit integre monolithique

Country Status (4)

Country Link
DE (1) DE2444486A1 (fr)
FR (1) FR2285750A1 (fr)
GB (1) GB1518166A (fr)
IT (1) IT1042571B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0167157A2 (fr) * 1984-07-05 1986-01-08 Hewlett-Packard Company Circuit de retard

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2071943B (en) * 1980-03-10 1984-06-27 Control Data Corp Delay lock loop
DE3217050A1 (de) * 1982-05-06 1983-11-10 Siemens AG, 1000 Berlin und 8000 München Verzoegerungsschaltung fuer digitalsignale
JPS5972814A (ja) * 1982-10-20 1984-04-24 Sanyo Electric Co Ltd 遅延回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1178460B (de) * 1962-05-29 1964-09-24 Siemens Ag Schaltung fuer Einrichtungen der elektrischen Nachrichtentechnik zur Verzoegerung einer kontinuierlichen Signalspannung

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1178460B (de) * 1962-05-29 1964-09-24 Siemens Ag Schaltung fuer Einrichtungen der elektrischen Nachrichtentechnik zur Verzoegerung einer kontinuierlichen Signalspannung

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0167157A2 (fr) * 1984-07-05 1986-01-08 Hewlett-Packard Company Circuit de retard
EP0167157A3 (en) * 1984-07-05 1987-07-22 Hewlett-Packard Company Delay circuit

Also Published As

Publication number Publication date
GB1518166A (en) 1978-07-19
IT1042571B (it) 1980-01-30
DE2444486A1 (de) 1976-04-01

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Legal Events

Date Code Title Description
ST Notification of lapse