FR2244231A1 - Thin layer MOS memory device - has address decoder on insulating substrate connected to transistor array - Google Patents

Thin layer MOS memory device - has address decoder on insulating substrate connected to transistor array

Info

Publication number
FR2244231A1
FR2244231A1 FR7333238A FR7333238A FR2244231A1 FR 2244231 A1 FR2244231 A1 FR 2244231A1 FR 7333238 A FR7333238 A FR 7333238A FR 7333238 A FR7333238 A FR 7333238A FR 2244231 A1 FR2244231 A1 FR 2244231A1
Authority
FR
France
Prior art keywords
address decoder
insulating substrate
memory device
thin layer
transistor array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7333238A
Other languages
English (en)
French (fr)
Other versions
FR2244231B3 (xx
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2244231A1 publication Critical patent/FR2244231A1/fr
Application granted granted Critical
Publication of FR2244231B3 publication Critical patent/FR2244231B3/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
FR7333238A 1972-09-18 1973-09-17 Thin layer MOS memory device - has address decoder on insulating substrate connected to transistor array Granted FR2244231A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2245689 1972-09-18

Publications (2)

Publication Number Publication Date
FR2244231A1 true FR2244231A1 (en) 1975-04-11
FR2244231B3 FR2244231B3 (xx) 1976-08-13

Family

ID=5856632

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7333238A Granted FR2244231A1 (en) 1972-09-18 1973-09-17 Thin layer MOS memory device - has address decoder on insulating substrate connected to transistor array

Country Status (6)

Country Link
JP (1) JPS4970543A (xx)
BE (1) BE804980A (xx)
FR (1) FR2244231A1 (xx)
IT (1) IT993186B (xx)
LU (1) LU68431A1 (xx)
NL (1) NL7312782A (xx)

Also Published As

Publication number Publication date
JPS4970543A (xx) 1974-07-08
LU68431A1 (xx) 1973-11-26
FR2244231B3 (xx) 1976-08-13
BE804980A (fr) 1974-01-16
NL7312782A (xx) 1974-03-20
IT993186B (it) 1975-09-30

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Legal Events

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