FR2176103A1 - - Google Patents

Info

Publication number
FR2176103A1
FR2176103A1 FR7309330A FR7309330A FR2176103A1 FR 2176103 A1 FR2176103 A1 FR 2176103A1 FR 7309330 A FR7309330 A FR 7309330A FR 7309330 A FR7309330 A FR 7309330A FR 2176103 A1 FR2176103 A1 FR 2176103A1
Authority
FR
France
Prior art keywords
chips
members
lead
semi
apertures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7309330A
Other languages
French (fr)
Other versions
FR2176103B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of FR2176103A1 publication Critical patent/FR2176103A1/fr
Application granted granted Critical
Publication of FR2176103B1 publication Critical patent/FR2176103B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
    • H01L31/16Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources
    • H01L31/167Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by potential barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12043Photo diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • H01L2924/13034Silicon Controlled Rectifier [SCR]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Electromagnetism (AREA)
  • Led Device Packages (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

1417802 Semi-conductor devices; component assemblies MOTOROLA Inc 8 Feb 1973 [15 March 1972] 6279/73 Headings H1K and H1R A semi-conductor device comprises a pair of semi-conductor dies, e.g. a light emitting diode and a light responsive transistor or SCR, juxtaposed facing so that the latter receives light from the former to selectively control, e.g. its resistance; conductively mounted on lead frames, separated by transparent material, and encapsulated with protruding connection members. An elongate lead frame portion 10 (Fig. 1) divided into segments 12, 14, 16 is etched stamped or machined from a metallic strip of, e.g. Ni, and each segment comprises, e.g. end joining bands 18, 20, parallel side bars 22, 24, and lead spacing members 25, 27; the segments enclosing a central area 30. Fingers extending into area 30 have end portions 34, 44 of which the control portions bear mounting areas 36, 48 for supporting semi-conductor chips, e.g. light emitting diode and, e.g. phototransistor; the fingers being respectively connected over members 25, 27 and lead portions 54, 55 to bands 18, 20. Interconnecting members 51 adapted to dovetail fit apertures 50 are integral with side bars 22, 24, and indexing apertures 56 of bands 18, 20 align the frame during automated manufacture. The inner ends of the fingers (Fig. 2, not shown) are offset to lie in a plane parallel to and displaced from that of the lead frame, and the surfaces are plated with Au. A Si chip providing a light emitting diode is mounted on area 36, and a Si chip providing a phototransistor is mounted on area 48 by an automatic die bonder in a line production machine engaging indexing apertures 56, and a wire bonder connects Au wires 62 from flanking fingers to electrodes of the chips by thermocompression welding. Thereafter member 25 is sheared along lines 64 to separate the frame into two portions 70, 72 (Fig. 3) and the lower half 72 is turned 180 degrees (Fig. 4) and offered to the upper half 70 so that projections 51 interlock apertures 50, and corresponding pairs of chips 60, 61 are juxtaposed face to face. Corresponding laterally spaced projections and apertures also interlock to define lead frame 90 with segments 92, 94, 96 (Fig. 4). The offset ends of the mounting fingers lie in separate planes to hold the semi-conductor chips 60, 61 in opposition, and side joining bars 78, 80 and lead spacing members 25, 27 lie in a distinct plane parallel thereto (Fig. 5). Transparent material is inserted between the chips (Fig. 6, not shown) and may form part of the encapsulant plastic, which is applied in a transfer mould; the indexing apertures being positioned to engage members of the mould faces which enclose the side joining bars and lead spacing members. An e.g. thermosetting phenolic or silicon plastic is forced into each mould which contains a respective semiconductor pair and the relevant connections to form an enclosing body, e.g. 100 (Fig. 4). After encapsulation, members 25, 27 are trimmed off by shearing along lines 102 to separate the encapsulated devices and their leads from frame 90, and the leads are bent over at 90 degrees for insertion into a socket; being arranged in parallel rows one on each side (Fig. 7, not shown). In modifications (Fig. 8 to 10, not shown) alternative structures accommodate dual semiconductor chips with more than three electrodes and connecting leads, or triple such chips of which one is eventually located in sandwich between the others.
FR7309330A 1972-03-15 1973-03-15 Expired FR2176103B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23495572A 1972-03-15 1972-03-15

Publications (2)

Publication Number Publication Date
FR2176103A1 true FR2176103A1 (en) 1973-10-26
FR2176103B1 FR2176103B1 (en) 1976-09-10

Family

ID=22883463

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7309330A Expired FR2176103B1 (en) 1972-03-15 1973-03-15

Country Status (4)

Country Link
JP (1) JPS517979B2 (en)
DE (2) DE7309359U (en)
FR (1) FR2176103B1 (en)
GB (1) GB1417802A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0103032A1 (en) * 1982-09-09 1984-03-21 General Electric Company Semiconductor optocoupler
EP0206325A2 (en) * 1985-06-25 1986-12-30 Hewlett-Packard Company Method for fabricating an optical isolator.
EP0213105A2 (en) * 1985-08-14 1987-03-04 Quaestus Corporation Method for assembling an optoisolator and leadframe therefor
EP0273364A2 (en) * 1986-12-26 1988-07-06 Idec Izumi Corporation Electronic part carrying strip and method of manufacturing the same
US5049527A (en) * 1985-06-25 1991-09-17 Hewlett-Packard Company Optical isolator
US5148243A (en) * 1985-06-25 1992-09-15 Hewlett-Packard Company Optical isolator with encapsulation

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4952463U (en) * 1972-08-18 1974-05-09
DE3424876A1 (en) * 1984-07-06 1986-02-06 Telefunken Fernseh Und Rundfunk Gmbh, 3000 Hannover Integrated circuit
DE4411345C1 (en) * 1994-03-31 1995-05-24 Amphenol Tuchel Elect Contact switching device for IC card reader
JP5889753B2 (en) * 2012-08-31 2016-03-22 新電元工業株式会社 Lead frame and method for manufacturing resin-encapsulated semiconductor device
JP6258044B2 (en) * 2014-01-20 2018-01-10 新電元工業株式会社 Lead frame and lead frame manufacturing method
JP6189222B2 (en) * 2014-01-20 2017-08-30 新電元工業株式会社 Lead frame and lead frame manufacturing method
JP6352508B2 (en) * 2017-07-27 2018-07-04 新電元工業株式会社 Lead frame and lead frame manufacturing method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NEANT *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0103032A1 (en) * 1982-09-09 1984-03-21 General Electric Company Semiconductor optocoupler
EP0206325A2 (en) * 1985-06-25 1986-12-30 Hewlett-Packard Company Method for fabricating an optical isolator.
EP0206325A3 (en) * 1985-06-25 1989-03-15 Hewlett-Packard Company Optical isolator
US5049527A (en) * 1985-06-25 1991-09-17 Hewlett-Packard Company Optical isolator
US5148243A (en) * 1985-06-25 1992-09-15 Hewlett-Packard Company Optical isolator with encapsulation
EP0213105A2 (en) * 1985-08-14 1987-03-04 Quaestus Corporation Method for assembling an optoisolator and leadframe therefor
EP0213105A3 (en) * 1985-08-14 1989-03-15 General Instrument Corporation Method for assembling an optoisolator and leadframe therefor
EP0273364A2 (en) * 1986-12-26 1988-07-06 Idec Izumi Corporation Electronic part carrying strip and method of manufacturing the same
EP0273364A3 (en) * 1986-12-26 1989-07-19 Idec Izumi Corporation Electronic part carrying strip and method of manufacturing the same
US4937654A (en) * 1986-12-26 1990-06-26 Idec Izumi Corporation Electronic part carrying strip and method of manufacturing the same
US5059373A (en) * 1986-12-26 1991-10-22 Idec Izumi Corporation Method of manufacturing continuous strip of electronic devices

Also Published As

Publication number Publication date
FR2176103B1 (en) 1976-09-10
GB1417802A (en) 1975-12-17
DE2312254B2 (en) 1980-05-22
DE7309359U (en) 1973-07-12
DE2312254A1 (en) 1973-09-27
DE2312254C3 (en) 1981-02-05
JPS494979A (en) 1974-01-17
JPS517979B2 (en) 1976-03-12

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