FR1457203A - Semiconductor manufacturing process - Google Patents

Semiconductor manufacturing process

Info

Publication number
FR1457203A
FR1457203A FR41607A FR41607A FR1457203A FR 1457203 A FR1457203 A FR 1457203A FR 41607 A FR41607 A FR 41607A FR 41607 A FR41607 A FR 41607A FR 1457203 A FR1457203 A FR 1457203A
Authority
FR
France
Prior art keywords
layer
substrate
laser
semi
welding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR41607A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of FR1457203A publication Critical patent/FR1457203A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
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    • H01L2224/83805—Soldering or alloying involving forming a eutectic alloy at the bonding interface
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    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Lasers (AREA)
  • Die Bonding (AREA)

Abstract

1,057,687. Bending a semi-conductor to a substrate. ASSOCIATED SEMICONDUCTOR MANUFACTURERS Ltd. Aug. 31, 1965 [Dec. 11, 1964], No. 50545/64. Heading H1K. A semi-conductor body is bonded to a substrate via an intermediate metallic layer using a laser, wherein the laser beam passes through the body on to the layer thereby welding the body to the substrate, the laser beam being of such a wavelength that absorption in the body is appreciably lower than in the layer. In a specific embodiment a phosphorus doped Si planar transistor is bonded to a gold-plated " Kovar " (Registered Trade Mark) header via a gold layer. The header has a glass-filled base and Fernico connecting wires for the electrodes. A Xenon laser may be used to heat the layer to at least 370‹ C. and thus form a Au/Si eutectic. In alternative embodiments the intermediate layer may be Au/Si or Au/Sn alloy whilst the support may be of Ni or nickel plated. After welding, the body may be encapsulated. A diode may also be mounted in a similar manner.
FR41607A 1964-12-11 1965-12-09 Semiconductor manufacturing process Expired FR1457203A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB50545/64A GB1057687A (en) 1964-12-11 1964-12-11 Improvements in and relating to methods of manufacturing semiconductor devices

Publications (1)

Publication Number Publication Date
FR1457203A true FR1457203A (en) 1966-10-28

Family

ID=10456301

Family Applications (1)

Application Number Title Priority Date Filing Date
FR41607A Expired FR1457203A (en) 1964-12-11 1965-12-09 Semiconductor manufacturing process

Country Status (3)

Country Link
DE (1) DE1514288C3 (en)
FR (1) FR1457203A (en)
GB (1) GB1057687A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH645208A5 (en) * 1978-10-31 1984-09-14 Bbc Brown Boveri & Cie PROCESS FOR MAKING ELECTRICAL CONTACTS ON SEMICONDUCTOR COMPONENTS.
FR2466860A1 (en) * 1979-10-05 1981-04-10 Radiotechnique Compelec Soldering of silicon semiconductor crystal onto nickel carrier - esp. where power semiconductor is soldered via tin film onto copper heat sink coated with nickel
DE3032461A1 (en) * 1980-08-28 1982-04-01 Siemens AG, 1000 Berlin und 8000 München Alloyed metal contact prodn. on oriented semiconductor crystal - by rastering surface with intense pulsed laser light before applying metal assists alloying
US4448632A (en) * 1981-05-25 1984-05-15 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor devices
DE3310362A1 (en) * 1983-03-22 1984-10-11 Siemens AG, 1000 Berlin und 8000 München Method of altering the optical properties of the interface between semiconductor material and metal contact
JP2813507B2 (en) * 1992-04-23 1998-10-22 三菱電機株式会社 Bonding method and bonding apparatus

Also Published As

Publication number Publication date
DE1514288A1 (en) 1969-06-12
DE1514288C3 (en) 1975-06-26
GB1057687A (en) 1967-02-08
DE1514288B2 (en) 1974-10-31

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