FI991507A - Vaihelukitun silmukan ohjaus synkronointilähteen vaihdon yhteydessä - Google Patents

Vaihelukitun silmukan ohjaus synkronointilähteen vaihdon yhteydessä Download PDF

Info

Publication number
FI991507A
FI991507A FI991507A FI991507A FI991507A FI 991507 A FI991507 A FI 991507A FI 991507 A FI991507 A FI 991507A FI 991507 A FI991507 A FI 991507A FI 991507 A FI991507 A FI 991507A
Authority
FI
Finland
Prior art keywords
change
connection
control
synchronization source
locking circuit
Prior art date
Application number
FI991507A
Other languages
English (en)
Swedish (sv)
Other versions
FI107481B (fi
Inventor
Markku Ruuskanen
Original Assignee
Nokia Networks Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Networks Oy filed Critical Nokia Networks Oy
Priority to FI991507A priority Critical patent/FI107481B/fi
Priority to EP00940432A priority patent/EP1192744A1/en
Priority to PCT/FI2000/000557 priority patent/WO2001003343A1/en
Priority to AU55369/00A priority patent/AU5536900A/en
Publication of FI991507A publication Critical patent/FI991507A/fi
Application granted granted Critical
Publication of FI107481B publication Critical patent/FI107481B/fi
Priority to US10/017,888 priority patent/US6904113B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H03L7/143—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by switching the reference signal of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/18—Temporarily disabling, deactivating or stopping the frequency counter or divider

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
FI991507A 1999-07-01 1999-07-01 Vaihelukitun silmukan ohjaus synkronointilähteen vaihdon yhteydessä FI107481B (fi)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FI991507A FI107481B (fi) 1999-07-01 1999-07-01 Vaihelukitun silmukan ohjaus synkronointilähteen vaihdon yhteydessä
EP00940432A EP1192744A1 (en) 1999-07-01 2000-06-21 Control of phase locked loop during change of synchronisation source
PCT/FI2000/000557 WO2001003343A1 (en) 1999-07-01 2000-06-21 Control of phase locked loop during change of synchronisation source
AU55369/00A AU5536900A (en) 1999-07-01 2000-06-21 Control of phase locked loop during change of synchronisation source
US10/017,888 US6904113B2 (en) 1999-07-01 2001-12-12 Control of phase locked loop during change of synchronization source

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI991507A FI107481B (fi) 1999-07-01 1999-07-01 Vaihelukitun silmukan ohjaus synkronointilähteen vaihdon yhteydessä
FI991507 1999-07-01

Publications (2)

Publication Number Publication Date
FI991507A true FI991507A (fi) 2001-01-02
FI107481B FI107481B (fi) 2001-08-15

Family

ID=8555005

Family Applications (1)

Application Number Title Priority Date Filing Date
FI991507A FI107481B (fi) 1999-07-01 1999-07-01 Vaihelukitun silmukan ohjaus synkronointilähteen vaihdon yhteydessä

Country Status (5)

Country Link
US (1) US6904113B2 (fi)
EP (1) EP1192744A1 (fi)
AU (1) AU5536900A (fi)
FI (1) FI107481B (fi)
WO (1) WO2001003343A1 (fi)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4135679B2 (ja) * 2004-05-27 2008-08-20 沖電気工業株式会社 通信タイミング制御装置、通信タイミング制御方法、ノード及び通信システム
DE102007046300A1 (de) * 2007-07-26 2009-01-29 Rohde & Schwarz Gmbh & Co. Kg Verfahren zur Synchronisation von mehreren Messkanalbaugruppen und/oder Messgeräten sowie entsprechendes Messgerät

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2060824T3 (es) 1989-03-02 1994-12-01 Siemens Ag Procedimiento para la resincronizacion de un impulso de reloj.
US5268655A (en) * 1992-05-27 1993-12-07 Codex Corporation Device and method for automatically adjusting a phase-locked loop
JPH084235B2 (ja) * 1993-03-31 1996-01-17 日本電気株式会社 周波数制御装置
US5473533A (en) * 1993-12-02 1995-12-05 Best Power Technology, Incorporated Method and apparatus for efficient phase and frequency coherence locking optimized for digital systems
JP3349830B2 (ja) * 1994-07-29 2002-11-25 沖電気工業株式会社 クロック発生回路
US5861842A (en) * 1997-08-29 1999-01-19 Space Systems/Loral, Inc. Spacecraft disciplined reference oscillator

Also Published As

Publication number Publication date
US6904113B2 (en) 2005-06-07
WO2001003343A1 (en) 2001-01-11
EP1192744A1 (en) 2002-04-03
FI107481B (fi) 2001-08-15
US20020048337A1 (en) 2002-04-25
AU5536900A (en) 2001-01-22

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