AU2002224587A1 - Analog phase locked loop holdover - Google Patents

Analog phase locked loop holdover

Info

Publication number
AU2002224587A1
AU2002224587A1 AU2002224587A AU2458702A AU2002224587A1 AU 2002224587 A1 AU2002224587 A1 AU 2002224587A1 AU 2002224587 A AU2002224587 A AU 2002224587A AU 2458702 A AU2458702 A AU 2458702A AU 2002224587 A1 AU2002224587 A1 AU 2002224587A1
Authority
AU
Australia
Prior art keywords
holdover
locked loop
phase locked
analog phase
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002224587A
Inventor
Rejean Beaulieu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marconi Communications Inc
Original Assignee
Marconi Communications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Communications Inc filed Critical Marconi Communications Inc
Publication of AU2002224587A1 publication Critical patent/AU2002224587A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/14Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/14Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H03L7/146Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by using digital means for generating the oscillator control signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
AU2002224587A 2000-07-26 2001-07-02 Analog phase locked loop holdover Abandoned AU2002224587A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/625,698 2000-07-26
US09/625,698 US6313708B1 (en) 2000-07-26 2000-07-26 Analog phase locked loop holdover
PCT/US2001/020936 WO2002009290A2 (en) 2000-07-26 2001-07-02 Analog phase locked loop holdover

Publications (1)

Publication Number Publication Date
AU2002224587A1 true AU2002224587A1 (en) 2002-02-05

Family

ID=24507194

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002224587A Abandoned AU2002224587A1 (en) 2000-07-26 2001-07-02 Analog phase locked loop holdover

Country Status (3)

Country Link
US (1) US6313708B1 (en)
AU (1) AU2002224587A1 (en)
WO (1) WO2002009290A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6512403B2 (en) * 2001-02-14 2003-01-28 Samsung Electronics Co., Ltd. Phase-locked loop for reducing frequency lock time
JP2003347936A (en) * 2001-11-02 2003-12-05 Seiko Epson Corp Clock shaping circuit and electronic equipment
DE10331829B4 (en) * 2003-07-14 2009-04-16 Qimonda Ag Method and device for generating a reference voltage
US7268605B2 (en) * 2004-06-14 2007-09-11 Rambus, Inc. Technique for operating a delay circuit
DE102006024470B4 (en) * 2006-05-24 2015-07-09 Xignal Technologies Ag Switchable phase-locked loop and method for operating a switchable phase-locked loop
US7733999B2 (en) * 2006-06-20 2010-06-08 Ciena Corporation System and method for an adaptable timing recovery architecture for critically-timed transport applications
JP4374463B2 (en) * 2006-12-26 2009-12-02 日本電波工業株式会社 Oscillation frequency control circuit
US11437999B1 (en) 2021-02-19 2022-09-06 Northrop Grumman Systems Corporation Analog phase lock loop

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6390216A (en) * 1986-10-03 1988-04-21 Matsushita Electric Ind Co Ltd Pll circuit
US5254955A (en) 1989-08-25 1993-10-19 Anritsu Corporation Advanced phase locked loop circuit
US5216374A (en) * 1991-07-03 1993-06-01 General Instrument Corporation Frequency synthesizer utilizing pulse-width modulation of digital VCO control signal
JPH06197014A (en) * 1992-12-25 1994-07-15 Mitsubishi Electric Corp Phase locked loop circuit
FI97003C (en) * 1993-09-27 1996-09-25 Nokia Telecommunications Oy Method for controlling a phase-locked loop and a phase-locked loop
IL120119A0 (en) * 1997-01-31 1997-04-15 Binder Yehuda Method and system for calibrating a crystal oscillator
JP2000174616A (en) * 1998-12-04 2000-06-23 Fujitsu Ltd Semiconductor integrated circuit
US7010076B1 (en) * 1999-10-29 2006-03-07 Adc Telecommunications, Inc. Systems and methods for holdover circuits in phase locked loops

Also Published As

Publication number Publication date
WO2002009290A3 (en) 2002-08-15
WO2002009290A2 (en) 2002-01-31
US6313708B1 (en) 2001-11-06

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