GB0008640D0 - Phase locked loop synthesisers - Google Patents

Phase locked loop synthesisers

Info

Publication number
GB0008640D0
GB0008640D0 GBGB0008640.5A GB0008640A GB0008640D0 GB 0008640 D0 GB0008640 D0 GB 0008640D0 GB 0008640 A GB0008640 A GB 0008640A GB 0008640 D0 GB0008640 D0 GB 0008640D0
Authority
GB
United Kingdom
Prior art keywords
locked loop
phase locked
synthesisers
loop synthesisers
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB0008640.5A
Other versions
GB2361119A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Priority to GB0008640A priority Critical patent/GB2361119A/en
Publication of GB0008640D0 publication Critical patent/GB0008640D0/en
Publication of GB2361119A publication Critical patent/GB2361119A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
GB0008640A 2000-04-07 2000-04-07 Phase locked loop synthesisers Withdrawn GB2361119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0008640A GB2361119A (en) 2000-04-07 2000-04-07 Phase locked loop synthesisers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0008640A GB2361119A (en) 2000-04-07 2000-04-07 Phase locked loop synthesisers

Publications (2)

Publication Number Publication Date
GB0008640D0 true GB0008640D0 (en) 2000-05-31
GB2361119A GB2361119A (en) 2001-10-10

Family

ID=9889473

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0008640A Withdrawn GB2361119A (en) 2000-04-07 2000-04-07 Phase locked loop synthesisers

Country Status (1)

Country Link
GB (1) GB2361119A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2389254B (en) 2002-05-31 2005-09-07 Hitachi Ltd Semiconductor integrated circuit device for communication
US7103337B2 (en) 2002-05-31 2006-09-05 Hitachi, Ltd. PLL circuit having a multi-band oscillator and compensating oscillation frequency
GB2420922B (en) * 2002-05-31 2006-08-02 Renesas Tech Corp Semiconductor integrated circuit device for communication
FR3112044B1 (en) 2020-06-24 2023-10-27 St Microelectronics Rousset Method for managing the start of a phase-locked loop, and corresponding integrated circuit

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02502960A (en) * 1988-01-13 1990-09-13 プレッシー　セミコンダクターズ　リミテッド frequency synthesizer
EP0482823B1 (en) * 1990-10-22 1998-08-26 Nec Corporation PLL frequency synthesizer capable of changing an output frequency at a high speed
JPH0548450A (en) * 1991-08-08 1993-02-26 Fujitsu Ltd Pll synthesizer circuit
JP3344610B2 (en) * 1995-04-28 2002-11-11 日本電信電話株式会社 User data testing method and communication service providing method
US5955928A (en) * 1996-12-26 1999-09-21 Micro Magic, Inc. Automatically adjusting the dynamic range of the VCO in a PLL at start-up for optimal operating point
WO1999005792A1 (en) * 1997-07-24 1999-02-04 Mitsubishi Denki Kabushiki Kaisha Pll frequency synthesizer and method for controlling the pll frequency synthesizer
JP3047968B2 (en) * 1997-08-07 2000-06-05 日本電気株式会社 PLL circuit

Also Published As

Publication number Publication date
GB2361119A (en) 2001-10-10

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)