DE60032966D1 - Steuerungsschaltung mit einer Taktssteuerungseinheit - Google Patents
Steuerungsschaltung mit einer TaktssteuerungseinheitInfo
- Publication number
- DE60032966D1 DE60032966D1 DE60032966T DE60032966T DE60032966D1 DE 60032966 D1 DE60032966 D1 DE 60032966D1 DE 60032966 T DE60032966 T DE 60032966T DE 60032966 T DE60032966 T DE 60032966T DE 60032966 D1 DE60032966 D1 DE 60032966D1
- Authority
- DE
- Germany
- Prior art keywords
- control unit
- control circuit
- clock
- clock control
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15468199 | 1999-06-02 | ||
JP11154681A JP2000347761A (ja) | 1999-06-02 | 1999-06-02 | 制御回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60032966D1 true DE60032966D1 (de) | 2007-03-08 |
DE60032966T2 DE60032966T2 (de) | 2007-11-08 |
Family
ID=15589601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60032966T Expired - Fee Related DE60032966T2 (de) | 1999-06-02 | 2000-05-23 | Steuerungsschaltung mit einer Taktssteuerungseinheit |
Country Status (4)
Country | Link |
---|---|
US (1) | US6342795B1 (de) |
EP (1) | EP1058180B1 (de) |
JP (1) | JP2000347761A (de) |
DE (1) | DE60032966T2 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE60034345D1 (de) * | 2000-11-03 | 2007-05-24 | St Microelectronics Srl | Abschaltprotokoll für integrierte Schaltungen |
EP1204017B1 (de) * | 2000-11-03 | 2007-04-11 | STMicroelectronics S.r.l. | Vorrichtung und Verfahren zur selektiven Abschaltung integrierter Schaltungsblöcke |
TW482954B (en) * | 2000-11-10 | 2002-04-11 | Via Tech Inc | Internal operation method of chip set to reduce the power consumption |
JP4831899B2 (ja) | 2001-08-28 | 2011-12-07 | 富士通セミコンダクター株式会社 | 半導体集積回路及びクロック制御方法 |
JP2003296296A (ja) * | 2002-01-30 | 2003-10-17 | Oki Electric Ind Co Ltd | マイクロコントローラ |
US7007181B2 (en) * | 2002-04-23 | 2006-02-28 | Oki Electric Industry Co., Ltd. | Microcontroller |
JP4136822B2 (ja) | 2003-07-31 | 2008-08-20 | 富士通株式会社 | 半導体集積回路装置、クロック制御方法及びデータ転送制御方法 |
US7500123B2 (en) * | 2004-06-28 | 2009-03-03 | Ati Technologies Ulc | Apparatus and method for reducing power consumption in a graphics processing device |
US7958483B1 (en) * | 2006-12-21 | 2011-06-07 | Nvidia Corporation | Clock throttling based on activity-level signals |
US7802118B1 (en) | 2006-12-21 | 2010-09-21 | Nvidia Corporation | Functional block level clock-gating within a graphics processor |
US7797561B1 (en) * | 2006-12-21 | 2010-09-14 | Nvidia Corporation | Automatic functional block level clock-gating |
DE102008007004B4 (de) * | 2008-01-31 | 2010-09-23 | Advanced Micro Devices, Inc., Sunnyvale | Integrierte Schaltung mit einem Speicher mit mehreren Speicherzellen mit synchronem Aufbau, die mit Taktausblendeeinheiten verbunden sind, sowie Verfahren zum Entwerfen einer solchen Schaltung |
JP2013097507A (ja) * | 2011-10-31 | 2013-05-20 | Ricoh Co Ltd | 半導体装置、電子機器及びクロック信号停止方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04143819A (ja) * | 1989-12-15 | 1992-05-18 | Hitachi Ltd | 消費電力制御方法、半導体集積回路装置およびマイクロプロセツサ |
US5452434A (en) * | 1992-07-14 | 1995-09-19 | Advanced Micro Devices, Inc. | Clock control for power savings in high performance central processing units |
JPH0683756A (ja) | 1992-08-31 | 1994-03-25 | Toshiba Corp | データ処理装置 |
JP2636695B2 (ja) * | 1993-08-03 | 1997-07-30 | 日本電気株式会社 | パイプライン処理回路 |
JP3475510B2 (ja) * | 1994-08-09 | 2003-12-08 | ヤマハ株式会社 | 省電力機能付き集積回路 |
WO1996025701A1 (en) * | 1995-02-14 | 1996-08-22 | Vlsi Technology, Inc. | Method and apparatus for reducing power consumption in digital electronic circuits |
KR0142968B1 (ko) * | 1995-06-30 | 1998-08-17 | 김광호 | 반도체 메모리 장치의 클럭 발생 장치 |
JP3520611B2 (ja) * | 1995-07-06 | 2004-04-19 | 株式会社日立製作所 | プロセッサの制御方法 |
JP3556340B2 (ja) * | 1995-08-21 | 2004-08-18 | 株式会社東芝 | コンピュータシステム |
US6100732A (en) * | 1997-06-20 | 2000-08-08 | Sun Microsystems, Inc. | Phase enable and clock generation circuit |
-
1999
- 1999-06-02 JP JP11154681A patent/JP2000347761A/ja active Pending
-
2000
- 2000-05-23 EP EP00304331A patent/EP1058180B1/de not_active Expired - Lifetime
- 2000-05-23 DE DE60032966T patent/DE60032966T2/de not_active Expired - Fee Related
- 2000-06-01 US US09/587,550 patent/US6342795B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1058180A3 (de) | 2005-04-20 |
JP2000347761A (ja) | 2000-12-15 |
US6342795B1 (en) | 2002-01-29 |
DE60032966T2 (de) | 2007-11-08 |
EP1058180B1 (de) | 2007-01-17 |
EP1058180A2 (de) | 2000-12-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |