FI20060697A - Förfarande för tillverkning av ledare och halvledare - Google Patents

Förfarande för tillverkning av ledare och halvledare Download PDF

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Publication number
FI20060697A
FI20060697A FI20060697A FI20060697A FI20060697A FI 20060697 A FI20060697 A FI 20060697A FI 20060697 A FI20060697 A FI 20060697A FI 20060697 A FI20060697 A FI 20060697A FI 20060697 A FI20060697 A FI 20060697A
Authority
FI
Finland
Prior art keywords
sintering
voltage
layer
substrate
sintered
Prior art date
Application number
FI20060697A
Other languages
English (en)
Finnish (fi)
Other versions
FI121562B (sv
FI20060697A0 (sv
Inventor
Heikki Seppae
Mark Allen
Original Assignee
Valtion Teknillinen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Valtion Teknillinen filed Critical Valtion Teknillinen
Priority to FI20060697A priority Critical patent/FI121562B/sv
Publication of FI20060697A0 publication Critical patent/FI20060697A0/sv
Publication of FI20060697A publication Critical patent/FI20060697A/sv
Application granted granted Critical
Publication of FI121562B publication Critical patent/FI121562B/sv

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Powder Metallurgy (AREA)
FI20060697A 2006-07-21 2006-07-21 Förfarande för tillverkning av ledare och halvledare FI121562B (sv)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FI20060697A FI121562B (sv) 2006-07-21 2006-07-21 Förfarande för tillverkning av ledare och halvledare

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20060697 2006-07-21
FI20060697A FI121562B (sv) 2006-07-21 2006-07-21 Förfarande för tillverkning av ledare och halvledare

Publications (3)

Publication Number Publication Date
FI20060697A0 FI20060697A0 (sv) 2006-07-21
FI20060697A true FI20060697A (sv) 2008-01-22
FI121562B FI121562B (sv) 2010-12-31

Family

ID=36758304

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20060697A FI121562B (sv) 2006-07-21 2006-07-21 Förfarande för tillverkning av ledare och halvledare

Country Status (1)

Country Link
FI (1) FI121562B (sv)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2001272A2 (en) 2007-06-08 2008-12-10 Valtion Teknillinen Tutkimuskeskus Method and apparatus related to nanoparticle systems
EP2001273A2 (en) 2007-06-08 2008-12-10 Valtion Teknillinen Tutkimuskeskus Method for producing conductor structures and applications thereof
EP2001053A2 (en) 2007-06-08 2008-12-10 Valtion Teknillinen Tutkimuskeskus Electronics module, method for the manufacture thereof and applications

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2001272A2 (en) 2007-06-08 2008-12-10 Valtion Teknillinen Tutkimuskeskus Method and apparatus related to nanoparticle systems
EP2001273A2 (en) 2007-06-08 2008-12-10 Valtion Teknillinen Tutkimuskeskus Method for producing conductor structures and applications thereof
EP2001053A2 (en) 2007-06-08 2008-12-10 Valtion Teknillinen Tutkimuskeskus Electronics module, method for the manufacture thereof and applications
EP2001272A3 (en) * 2007-06-08 2010-02-24 Valtion Teknillinen Tutkimuskeskus Method and apparatus related to nanoparticle systems
EP2001273A3 (en) * 2007-06-08 2010-02-24 Valtion Teknillinen Tutkimuskeskus Method for producing conductor structures and applications thereof
US7759160B2 (en) 2007-06-08 2010-07-20 Valtion Teknillinen Tutkimuskeskus Method for producing conductor structures and applications thereof
US7915097B2 (en) 2007-06-08 2011-03-29 Valtion Teknillinen Tutkimuskeskus Electronic module with conductivity transformation region, method of manufacture and applications thereof
US8916089B2 (en) 2007-06-08 2014-12-23 Valtion Teknillinen Tutkimuskeskus Method and apparatus related to nanoparticle systems

Also Published As

Publication number Publication date
FI121562B (sv) 2010-12-31
FI20060697A0 (sv) 2006-07-21

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