FI105429B - Laite Viterbin algoritmin käsittelemiseksi, jossa on prosessori ja erityisoperaattori - Google Patents

Laite Viterbin algoritmin käsittelemiseksi, jossa on prosessori ja erityisoperaattori Download PDF

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Publication number
FI105429B
FI105429B FI915365A FI915365A FI105429B FI 105429 B FI105429 B FI 105429B FI 915365 A FI915365 A FI 915365A FI 915365 A FI915365 A FI 915365A FI 105429 B FI105429 B FI 105429B
Authority
FI
Finland
Prior art keywords
processor
operator
metr
value
bit
Prior art date
Application number
FI915365A
Other languages
English (en)
Finnish (fi)
Swedish (sv)
Other versions
FI915365A0 (fi
FI915365A (fi
Inventor
Lydie Desperben
Emmanuel Rousseau
Luc Dartois
Original Assignee
Alcatel Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Nv filed Critical Alcatel Nv
Publication of FI915365A0 publication Critical patent/FI915365A0/fi
Publication of FI915365A publication Critical patent/FI915365A/fi
Application granted granted Critical
Publication of FI105429B publication Critical patent/FI105429B/fi

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6569Implementation on processors, e.g. DSPs, or software implementations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0054Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms

Landscapes

  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Non-Silver Salt Photosensitive Materials And Non-Silver Salt Photography (AREA)
  • Photoreceptors In Electrophotography (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)
  • Communication Control (AREA)
  • Electrotherapy Devices (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Detection And Correction Of Errors (AREA)
FI915365A 1990-11-15 1991-11-13 Laite Viterbin algoritmin käsittelemiseksi, jossa on prosessori ja erityisoperaattori FI105429B (fi)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
FR9014230A FR2669445B1 (fr) 1990-11-15 1990-11-15 Dispositif prevu pour le traitement de l'algorithme de viterbi comprenant un processeur et un operateur specialise.
FR9014230 1990-11-15
SG92994 1994-07-12
SG92994A SG92994G (en) 1990-11-15 1994-07-12 Device for the processing of the viterbi algorithm comprising a processor and a specialized unit

Publications (3)

Publication Number Publication Date
FI915365A0 FI915365A0 (fi) 1991-11-13
FI915365A FI915365A (fi) 1992-05-16
FI105429B true FI105429B (fi) 2000-08-15

Family

ID=26228335

Family Applications (1)

Application Number Title Priority Date Filing Date
FI915365A FI105429B (fi) 1990-11-15 1991-11-13 Laite Viterbin algoritmin käsittelemiseksi, jossa on prosessori ja erityisoperaattori

Country Status (14)

Country Link
US (1) US5331664A (de)
EP (1) EP0485921B1 (de)
JP (1) JP2524924B2 (de)
AT (1) ATE91206T1 (de)
AU (1) AU634676B2 (de)
CA (1) CA2055575C (de)
DE (1) DE69100150T2 (de)
DK (1) DK0485921T3 (de)
ES (1) ES2043418T3 (de)
FI (1) FI105429B (de)
FR (1) FR2669445B1 (de)
HK (1) HK85794A (de)
NZ (2) NZ248064A (de)
SG (1) SG92994G (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4224214C2 (de) * 1992-07-22 1995-02-09 Deutsche Forsch Luft Raumfahrt Verfahren zur quellengesteuerten Kanaldecodierung durch Erweiterung des Viterbi-Algorithmus
US5454014A (en) * 1993-11-16 1995-09-26 At&T Corp. Digital signal processor
US5465275A (en) * 1993-11-16 1995-11-07 At&T Ipm Corp. Efficient utilization of present state/next state registers
US5432804A (en) * 1993-11-16 1995-07-11 At&T Corp. Digital processor and viterbi decoder having shared memory
TW243568B (en) * 1993-11-16 1995-03-21 At & T Corp Digital signal processor with an embedded viterbi co-processor
US5513220A (en) * 1993-11-16 1996-04-30 At&T Corp. Digital receiver with minimum cost index register
US5539757A (en) * 1993-12-22 1996-07-23 At&T Corp. Error correction systems with modified Viterbi decoding
FR2718865B1 (fr) * 1994-04-15 1996-07-19 Texas Instruments France Procédé et dispositif à processeur de signaux numériques pour la mise en Óoeuvre d'un algorithme de Viterbi.
JP3711290B2 (ja) * 1994-07-04 2005-11-02 沖電気工業株式会社 ディジタル演算回路
DE19511015A1 (de) * 1995-03-25 1996-09-26 Sel Alcatel Ag Schaltungsvorrichtung und damit ausgestattete Viterbi-Dekodiereinrichtung für einen Nachrichtenempfänger
US5742621A (en) * 1995-11-02 1998-04-21 Motorola Inc. Method for implementing an add-compare-select butterfly operation in a data processing system and instruction therefor
US5964825A (en) * 1996-02-09 1999-10-12 Texas Instruments Incorporated Manipulation of boolean values and conditional operation in a microprocessor
US6374346B1 (en) 1997-01-24 2002-04-16 Texas Instruments Incorporated Processor with conditional execution of every instruction
EP1271789B1 (de) * 2001-06-21 2006-04-12 Alcatel Log-MAP Dekodierung
US7116732B2 (en) * 2001-06-21 2006-10-03 Alcatel Method and apparatus for decoding a bit sequence
US6848074B2 (en) * 2001-06-21 2005-01-25 Arc International Method and apparatus for implementing a single cycle operation in a data processing system
US6718504B1 (en) 2002-06-05 2004-04-06 Arc International Method and apparatus for implementing a data processor adapted for turbo decoding

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8327084D0 (en) * 1983-10-11 1983-11-09 Gordon J Error correction decoder apparatus
JPS60180222A (ja) * 1984-02-27 1985-09-14 Nec Corp 符号誤り訂正装置
US4583078A (en) * 1984-11-13 1986-04-15 Communications Satellite Corporation Serial Viterbi decoder
FR2585906B1 (fr) * 1985-08-02 1987-09-25 Battail Gerard Procede de decodage d'un code convolutif et decodeur correspondant

Also Published As

Publication number Publication date
EP0485921B1 (de) 1993-06-30
FI915365A0 (fi) 1991-11-13
ATE91206T1 (de) 1993-07-15
FR2669445A1 (fr) 1992-05-22
US5331664A (en) 1994-07-19
EP0485921A1 (de) 1992-05-20
NZ240522A (en) 1994-04-27
DE69100150T2 (de) 1993-10-07
DK0485921T3 (da) 1993-11-29
JPH04290315A (ja) 1992-10-14
AU634676B2 (en) 1993-02-25
CA2055575C (fr) 1995-10-10
JP2524924B2 (ja) 1996-08-14
AU8707191A (en) 1992-06-11
FR2669445B1 (fr) 1993-01-08
DE69100150D1 (de) 1993-08-05
NZ248064A (en) 1994-04-27
CA2055575A1 (fr) 1992-05-16
ES2043418T3 (es) 1993-12-16
HK85794A (en) 1994-08-26
SG92994G (en) 1994-10-28
FI915365A (fi) 1992-05-16

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