ES8702679A1 - Un sistema de carga de memoria multiple - Google Patents
Un sistema de carga de memoria multipleInfo
- Publication number
- ES8702679A1 ES8702679A1 ES543645A ES543645A ES8702679A1 ES 8702679 A1 ES8702679 A1 ES 8702679A1 ES 543645 A ES543645 A ES 543645A ES 543645 A ES543645 A ES 543645A ES 8702679 A1 ES8702679 A1 ES 8702679A1
- Authority
- ES
- Spain
- Prior art keywords
- memories
- gls1
- modules
- loading system
- multiple memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17356—Indirect interconnection networks
- G06F15/17368—Indirect interconnection networks non hierarchical topologies
- G06F15/17393—Indirect interconnection networks non hierarchical topologies having multistage networks, e.g. broadcasting scattering, gathering, hot spot contention, combining/decombining
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Circuits Of Receivers In General (AREA)
- Communication Control (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Nitrogen Condensed Heterocyclic Rings (AREA)
- Multi Processors (AREA)
- Debugging And Monitoring (AREA)
- Saccharide Compounds (AREA)
- Computer And Data Communications (AREA)
- Information Transfer Between Computers (AREA)
Abstract
SISTEMA DE CARGA DE MEMORIA MULTIPLE. COMPRENDE UNA PLURALIDAD DE MODULOS INTERCONECTADOS (TCEA) (TCE1) QUE INCLUYE MEMORIAS Y MEDIOS DE PROCESO, UNO (TCEA) DE LOS CUALES ES CAPAZ DE TRANSMITIR UN SOLO PAQUETE DE DATOS DE UNA PLURALIDAD DE PAQUETES DE DATOS A LAS MEMORIAS DE UN NUMERO DE MODULOS DONDE EL PAQUETE DE DATOS, PUEDE SER ALMACENADO, Y DONDE LA TRANSMISION DE LOS PAQUETES DE DATOS DESDE EL MODULO (TCEA) UNICAMENTE SE PRODUCE DIRECTAMENTE A LAS MEMORIAS DE UN NUMERO DE MODULOS PREDETRMINADOS (TCE1) DE UN CONJUNTO INICIAL, E INDIRECTAMENTE DESDE LAS MEMORIAS DE LOS OTROS MODULOS. TIENE APLICACIONES EN EL CAMPO DE LA INFORMATICA POR PERMITIR UNA CARGA RAPIDA DEL MODULO DE MEMORIAS.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP84200783A EP0162970B1 (en) | 1984-06-01 | 1984-06-01 | Multiple memory loading system |
Publications (2)
Publication Number | Publication Date |
---|---|
ES8702679A1 true ES8702679A1 (es) | 1986-11-16 |
ES543645A0 ES543645A0 (es) | 1986-11-16 |
Family
ID=8192446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES543645A Expired ES8702679A1 (es) | 1984-06-01 | 1985-05-30 | Un sistema de carga de memoria multiple |
Country Status (11)
Country | Link |
---|---|
US (1) | US4866668A (es) |
EP (1) | EP0162970B1 (es) |
JP (1) | JPS619056A (es) |
AT (1) | ATE40501T1 (es) |
AU (1) | AU578287B2 (es) |
DE (1) | DE3476503D1 (es) |
ES (1) | ES8702679A1 (es) |
FI (1) | FI80183C (es) |
IN (1) | IN164797B (es) |
MX (1) | MX157241A (es) |
NO (1) | NO852033L (es) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2201066B (en) * | 1986-11-14 | 1991-08-21 | Fuji Xerox Co Ltd | Storage star network |
LU87095A1 (de) * | 1987-06-11 | 1988-04-05 | Siemens Ag | Schaltungsanordnung fuer eine zentralgesteuerte fernmeldevermittlungsanlage,insbesondere pcm-fernsprechvermittlungsanlage,mit einem zentralteil und mit diesem verbundenen anschlussgruppen |
AR246648A1 (es) * | 1987-10-06 | 1994-08-31 | Siemens Ag | Disposicion de circuito para instalaciones de enlace de telecomunicaciones gobernadas centralmente particularmente centrales de enlace telefonico-pcm |
GB8911395D0 (en) * | 1989-05-18 | 1989-07-05 | British Telecomm | Data communications network |
JPH04291538A (ja) * | 1991-03-19 | 1992-10-15 | Fujitsu Ltd | 予備回線を使用したダウンロード方式 |
US5224100A (en) * | 1991-05-09 | 1993-06-29 | David Sarnoff Research Center, Inc. | Routing technique for a hierarchical interprocessor-communication network between massively-parallel processors |
US5262906A (en) * | 1992-06-19 | 1993-11-16 | Alcatel Network Systems, Inc. | Message routing for SONET telecommunications maintenance network |
US5579527A (en) * | 1992-08-05 | 1996-11-26 | David Sarnoff Research Center | Apparatus for alternately activating a multiplier and a match unit |
US5581778A (en) * | 1992-08-05 | 1996-12-03 | David Sarnoff Researach Center | Advanced massively parallel computer using a field of the instruction to selectively enable the profiling counter to increase its value in response to the system clock |
US5586289A (en) * | 1994-04-15 | 1996-12-17 | David Sarnoff Research Center, Inc. | Method and apparatus for accessing local storage within a parallel processing computer |
GB9412553D0 (en) | 1994-06-22 | 1994-08-10 | At & T Global Solutions Intern | Method and apparatus for distributing software |
DE4438698A1 (de) * | 1994-10-29 | 1996-05-02 | Sel Alcatel Ag | Ladeverfahren für ein Mehrrechnersystem sowie Ladeeinrichtung, Rechnermodul, Mehrrechnersystem und Vermittlungssystem damit |
DE4438697A1 (de) * | 1994-10-29 | 1996-05-02 | Sel Alcatel Ag | Ladeverfahren für ein Mehrrechnersystem sowie Ladesteuereinrichtung und Programm-Modul dafür und Mehrrechnersystem und Vermittlungssystem damit |
DE19520030C1 (de) * | 1995-05-31 | 1996-05-15 | Siemens Ag | Verfahren zur Aktualisierung der Programmstruktur einer modularen Kommunikationsanlage |
JP3698761B2 (ja) * | 1995-07-19 | 2005-09-21 | 富士通株式会社 | 情報転送方法及び情報転送装置 |
US5910179A (en) * | 1996-10-25 | 1999-06-08 | Pitney Bowes Inc. | Method and system for transmitting data within a tree structure and receiving a confirmation or status therefor |
US6810408B1 (en) * | 2000-05-31 | 2004-10-26 | International Business Machines Corporation | Method and apparatus for controlling cascading e-mail distribution |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1108325B (it) * | 1978-04-10 | 1985-12-09 | Cselt Centro Studi Lab Telecom | Procedimento e dispositivo di in stradamento per una rete di comunicazione a commutazione di pacchetto |
JPS6023535B2 (ja) * | 1978-11-22 | 1985-06-07 | 株式会社リコー | フアクシミリの同報通信方式 |
BE876025A (nl) * | 1979-05-04 | 1979-11-05 | Bell Telephone Mfg | Signaleringsstelsel |
US4347498A (en) * | 1979-11-21 | 1982-08-31 | International Business Machines Corporation | Method and means for demand accessing and broadcast transmission among ports in a distributed star network |
JPS57134741A (en) * | 1981-02-12 | 1982-08-20 | Nec Corp | Program on-line load system |
JPS5875351A (ja) * | 1981-10-30 | 1983-05-07 | Fuji Xerox Co Ltd | デイジタル信号中継方式 |
SE428859B (sv) * | 1981-12-15 | 1983-07-25 | Ellemtel Utvecklings Ab | Anordning for laddning av minnen i en telekommunikationsvexel |
US4525830A (en) * | 1983-10-25 | 1985-06-25 | Databit, Inc. | Advanced network processor |
US4550397A (en) * | 1983-12-16 | 1985-10-29 | At&T Bell Laboratories | Alternate paths in a self-routing packet switching network |
-
1984
- 1984-06-01 AT AT84200783T patent/ATE40501T1/de not_active IP Right Cessation
- 1984-06-01 EP EP84200783A patent/EP0162970B1/en not_active Expired
- 1984-06-01 DE DE8484200783T patent/DE3476503D1/de not_active Expired
-
1985
- 1985-05-20 IN IN371/MAS/85A patent/IN164797B/en unknown
- 1985-05-21 AU AU42704/85A patent/AU578287B2/en not_active Ceased
- 1985-05-22 NO NO852033A patent/NO852033L/no unknown
- 1985-05-30 ES ES543645A patent/ES8702679A1/es not_active Expired
- 1985-05-30 FI FI852161A patent/FI80183C/fi not_active IP Right Cessation
- 1985-05-31 JP JP60116856A patent/JPS619056A/ja active Pending
- 1985-05-31 MX MX205488A patent/MX157241A/es unknown
-
1988
- 1988-03-30 US US07/178,887 patent/US4866668A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
AU578287B2 (en) | 1988-10-20 |
AU4270485A (en) | 1985-12-05 |
FI852161A0 (fi) | 1985-05-30 |
JPS619056A (ja) | 1986-01-16 |
FI852161L (fi) | 1985-12-02 |
FI80183C (fi) | 1990-04-10 |
NO852033L (no) | 1985-12-02 |
EP0162970B1 (en) | 1989-01-25 |
DE3476503D1 (en) | 1989-03-02 |
ES543645A0 (es) | 1986-11-16 |
EP0162970A1 (en) | 1985-12-04 |
MX157241A (es) | 1988-11-07 |
US4866668A (en) | 1989-09-12 |
FI80183B (fi) | 1989-12-29 |
IN164797B (es) | 1989-06-03 |
ATE40501T1 (de) | 1989-02-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES8702679A1 (es) | Un sistema de carga de memoria multiple | |
EP0226791A3 (en) | A memory with means for allocating address space among modules | |
EP0003849A3 (en) | Digital bus communications system | |
AU3359284A (en) | Ram based multiple breakpoint logic | |
ES8201379A1 (es) | Instalacion para la transmision rapida de mensajes entre calculadoras | |
EP0194415A3 (en) | Bus to bus converter | |
JPS5691558A (en) | Time slot allocation system | |
EP0210365A3 (en) | Sound transmission method for data way system | |
ES8306897A1 (es) | Un metodo de utilizar una linea de datos para transmitir datos entre una pluralidad de unidades de tratamiento de datos acopladas a ella. | |
JPS6412364A (en) | System constitution control system | |
JPS5743256A (en) | Memory which capable of making parallel access | |
GB1473898A (en) | Data transmission systems | |
JPS5762432A (en) | Input and output system | |
JPS56111945A (en) | Data buffer circuit | |
ES8801450A1 (es) | Un aparato para tratar paquetes de datos. | |
KR880006858A (ko) | 데이타 교환장치 | |
JPS5394144A (en) | Time-division multiple process system | |
DE3374256D1 (en) | Shift register arrangement and data transmission system comprising such an arrangement | |
JPS5744278A (en) | Selecting system of memory module | |
JPS5523643A (en) | Data transmission system | |
JPS56147543A (en) | Remote process input and output controller for computer | |
JPS57131194A (en) | Transmission system of information | |
JPS6490643A (en) | Line exchange | |
JPS5647146A (en) | Data transmission system | |
WO1989009966A3 (en) | Computer system with distributed associative memory |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 19990918 |