JPS56147543A - Remote process input and output controller for computer - Google Patents

Remote process input and output controller for computer

Info

Publication number
JPS56147543A
JPS56147543A JP5063980A JP5063980A JPS56147543A JP S56147543 A JPS56147543 A JP S56147543A JP 5063980 A JP5063980 A JP 5063980A JP 5063980 A JP5063980 A JP 5063980A JP S56147543 A JPS56147543 A JP S56147543A
Authority
JP
Japan
Prior art keywords
computer
input
time slot
process input
terminal device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5063980A
Other languages
Japanese (ja)
Inventor
Hisashi Morotomi
Shogo Nasu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5063980A priority Critical patent/JPS56147543A/en
Publication of JPS56147543A publication Critical patent/JPS56147543A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42Loop networks
    • H04L12/423Loop networks with centralised control, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To extend the data input time and to reduce the number of bits of one frame, by forming the dummy bit between the time slot for addressing of frame format on the common bus and the input/output data time slot. CONSTITUTION:The computer 1 and a plurality of process input/output terminal devices 3 in remote location are connected in loop with the frame format on the common bus. In this case, among the addressing time slot 7 to transmit the address for identification of the process input/output terminal device 3, output data from the computer 1 to each terminal device 3, and input/output data time slot 17 making the transmission of input data from each terminal device 3 to the computer 1 in the same frame, the dummy bit 19 in several bits is provided.
JP5063980A 1980-04-17 1980-04-17 Remote process input and output controller for computer Pending JPS56147543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5063980A JPS56147543A (en) 1980-04-17 1980-04-17 Remote process input and output controller for computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5063980A JPS56147543A (en) 1980-04-17 1980-04-17 Remote process input and output controller for computer

Publications (1)

Publication Number Publication Date
JPS56147543A true JPS56147543A (en) 1981-11-16

Family

ID=12864519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5063980A Pending JPS56147543A (en) 1980-04-17 1980-04-17 Remote process input and output controller for computer

Country Status (1)

Country Link
JP (1) JPS56147543A (en)

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