JPS5640346A - Data transmission system - Google Patents

Data transmission system

Info

Publication number
JPS5640346A
JPS5640346A JP11658979A JP11658979A JPS5640346A JP S5640346 A JPS5640346 A JP S5640346A JP 11658979 A JP11658979 A JP 11658979A JP 11658979 A JP11658979 A JP 11658979A JP S5640346 A JPS5640346 A JP S5640346A
Authority
JP
Japan
Prior art keywords
data
characters
frame
processing unit
character
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11658979A
Other languages
Japanese (ja)
Other versions
JPS5930298B2 (en
Inventor
Shigeo Shin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP54116589A priority Critical patent/JPS5930298B2/en
Publication of JPS5640346A publication Critical patent/JPS5640346A/en
Publication of JPS5930298B2 publication Critical patent/JPS5930298B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285—Halt processor DMA

Abstract

PURPOSE:To make it possible to transmit variable length data with a simple constitution and prevent lowering of the use efficiency of the operation processing unit, by arranging word length data, which indicates the number of characters of one frame, in the first character of one-frame data. CONSTITUTION:Central processing unit 1 is connected to plural terminal units 10A-10N through the transmission line, which transmits transmission data in bit series, and the receiving line which receives receiving data in bit series. The number of characters to be transmitted in one frame is arranged in the first character of one-frame data to be transmitted from central processing unit 1 to terminal units; and in terminal units, when direct memory access control circuit 15 receives character data, operation processing means 13 is interrupted, and then, the operation processing means sets the number of characters to control circuit 15. As a result, transmission data after the set number of characters can be decided as error.
JP54116589A 1979-09-10 1979-09-10 Data transmission method Expired JPS5930298B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54116589A JPS5930298B2 (en) 1979-09-10 1979-09-10 Data transmission method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54116589A JPS5930298B2 (en) 1979-09-10 1979-09-10 Data transmission method

Publications (2)

Publication Number Publication Date
JPS5640346A true JPS5640346A (en) 1981-04-16
JPS5930298B2 JPS5930298B2 (en) 1984-07-26

Family

ID=14690872

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54116589A Expired JPS5930298B2 (en) 1979-09-10 1979-09-10 Data transmission method

Country Status (1)

Country Link
JP (1) JPS5930298B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033648A (en) * 1983-08-04 1985-02-21 Nec Corp Serial data transfer control device
JP2020024637A (en) * 2018-08-08 2020-02-13 株式会社デンソー Electronic control device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033648A (en) * 1983-08-04 1985-02-21 Nec Corp Serial data transfer control device
JP2020024637A (en) * 2018-08-08 2020-02-13 株式会社デンソー Electronic control device

Also Published As

Publication number Publication date
JPS5930298B2 (en) 1984-07-26

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